Datasheet

Identifying Purposes and Characteristics of Processors

processors come in Solo (mobile only), Duo, and four-core (Quad) implementations. Solo

and Duo processors have a single die; Quad processors have two Duo dies. A more capable

Extreme version exists for the Duo and Quad models.

Processors, such as certain models of AMD’s Phenom series, can contain an odd number

of multiple cores as well. The triple-core processor, which obviously contains three cores,

is the most common implementation of multiple odd cores.

Throttling CPU throttling allows reducing the operating frequency of the CPU during

times of less demand or during battery operation. CPU throttling is very common in pro-

cessors for mobile devices, where heat generation and system-battery drain are key issues

of full power usage. You might discover throttling in action when you use a utility that

reports a lower CPU clock frequency than expected. If the load on the system does not

require full-throttle operation, there is no need to push such a limit.

Microcode and multimedia extensions Microcode is the set of instructions (known as an

instruction set) that make up the various microprograms that the processor executes while

carrying out its various duties. The Multimedia Extensions (MMX) microcode is a specialized

example of a separate microprogram that carries out a particular set of functions. Microcode

is at a much lower level than the code that makes up application programs. Each instruction

in an application will end up being represented by many microinstructions, on average. The

MMX instruction set is incorporated into most modern CPUs from Intel and others. MMX

came about as a way to take much of the multimedia processing off the CPU’s hands, leaving

the processor to other tasks. Think of it as sort of a coprocessor for multimedia, much like the

ﬂoating-point unit (FPU) is a math coprocessor.

Cache As mentioned in the “Memory Slots and Cache” section earlier in this chapter, cache

is a very fast chip memory that is used to hold data and instructions that are most likely to

be requested next by the CPU. The cache located on the CPU die is known as L1 cache and

is generally of a smaller capacity in comparison to L2 cache, which is located on the mother-

board or off-die in the same CPU packaging. When the CPU requires outside information, it

believes it requests that information from RAM. The cache controller, however, intercepts the

request and consults its tag RAM to discover if the requested information is already cached,

either at L1 or L2. If not, a cache miss is recorded and the information is brought back from

the much slower RAM, but this new information sticks to the various levels of cache on its

way to the CPU from RAM.

Speed The speed of the processor is generally described in clock frequency (MHz or

GHz). There can be a discrepancy between the advertised frequency and the frequency the

CPU uses to latch data and instructions through the pipeline. This disagreement between

the numbers comes from the fact that the CPU is capable of splitting the clock signal it

receives from the external oscillator that drives the frontside bus into multiple regular sig-

nals for its own internal use. In fact, you might be able to purchase a number of processors

rated for different (internal) speeds that are all compatible with a single motherboard that

has a frontside bus rated, for instance, at 800MHz.

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