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Agilent Technologies, Inc.

Agilent Technologies, Inc. SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.4

Serial ATA

International Organization

Version: 1.1 Revision 1.4

20 January 2011

Serial ATA Interoperability Program Revision 1.4

Agilent Technologies, Inc. Method of Implementation (MOI)

Document for SATA PHY, TSG & OOB Measurements

(Real-time DSO Measurements)

This document is provided "AS IS" and without any warranty of any kind, including, without limitation, any express

or implied warranty of non-infringement, merchantability or fitness for a particular purpose. In no event shall

SATA-IO or any member of SATA-IO be liable for any direct, indirect, special, exemplary, punitive, or

consequential damages, including, without limitation, lost profits, even if advised of the possibility of such damages.

This material is provided for reference only. The Serial ATA International Organization does not endorse the

vendors’ equipment outlined in this document.

Summary of content (87 pages)

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Agilent Technologies, Inc. Serial ATA International Organization Version: 1.1 Revision 1.4 20 January 2011 20 January 2011 Serial ATA Interoperability Program Revision 1.4 Agilent Technologies, Inc.
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Agilent Technologies, Inc. TABLE OF CONTENTS TABLE OF CONTENTS ..................................................................................... 2 ACKNOWLEDGMENTS ................................................................................... 7 INTRODUCTION ............................................................................................... 8 REFERENCES ...................................................................................................10 PHY GENERAL REQUIREMENTS...........
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Agilent Technologies, Inc. APPENDIX A – INFORMATION ON REQUIRED RESOURCES ................60 EXAMPLE N5411B PRODUCT TEST INITIAL SETUP PROCEDURE................................................ 62 APPENDIX B – CABLE DESKEW PROCEDURE .........................................67 APPENDIX C – VERIFICATION OF LAB LOAD RETURN LOSS .............69 APPENDIX D - MEASUREMENT ACCURACY SPECIFICATIONS...........74 APPENDIX E – CALIBRATION OF JITTER MEASUREMENT DEVICES ....................................................
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Agilent Technologies, Inc. MODIFICATION RECORD January 16, 2006 (Version 1.0 template) INITIAL RELEASE, TO LOGO TF MOI GROUP Andy Baldman: Initial Release February 7, 2006 (Version 0.8) INITIAL RELEASE, TO LOGO TF MOI GROUP Bryan Kantack: Initial Release February 20, 2006 (Version 0.9) Bryan Kantack: Updates made to reflect IW Event #1 Unified Test Document changes March 17, 2006 (Version 0.91) Bryan Kantack: General formatting, Update SATA templates to Rev 2.
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Agilent Technologies, Inc. December 13th, 2006 (Version 0.99d) Fei Xie: PHY02 Procedure detail January 9th, 2007 (Version 0.99e) Fei Xie: PHY02 Procedure detail with screenshot. January 31st, 2007 (Version 0.99f) Fei Xie: OOB 01, 06, 07 update to new method. Jitter algorithm update to new method. Added return loss Appendix October 31st, 2007 (Version 0.9 Revision 1.3) new nomenclature adopted by LOGO Bryan Kantack: Updated PHY-02 and PHY-04 measurement detail per ECN 016 changes.
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Agilent Technologies, Inc. October 27th, 2010 (Version 1.10RC Revision 1.4) Min-Jie Chong: Updated Agilent DSAX93204A, DSAX92804A, DSAX92504A, DSAX92004A and DSAX91604A oscilloscope models to the equipment list. Updated OOB-06 Comwake sequence gap values in accordance to the change in UTD 1.4 version 1.01. January 20th, 2011 (Version 1.10 Revision 1.4) Min-Jie Chong: Passed 30-day member review. Released as Version 1.10 Revision 1.4 Agilent Technologies, Inc. 6 SATA PHY, TSG & OOB Test MOI v.1.
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Agilent Technologies, Inc. ACKNOWLEDGMENTS Agilent Technologies, Inc. would like to acknowledge the efforts of the following individuals in the development of this document. SATA MOI Template Creation Andrew Baldman David Woolf University of New Hampshire Interoperability Lab University of New Hampshire Interoperability Lab Agilent PHY Test MOI Creation Bryan Kantack Fei Xie Min-Jie Chong Agilent Technologies, Inc. Agilent Technologies, Inc. Agilent Technologies, Inc. Agilent Technologies, Inc.
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Agilent Technologies, Inc. INTRODUCTION The tests contained in this document are organized in order to simplify the identification of information related to a test, and to facilitate in the actual testing process. Tests are separated into groups, primarily in order to reduce setup time in the lab environment, however the different groups typically also tend to focus on specific aspects of products functionality.
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Agilent Technologies, Inc. Observable Results This section lists the specific observables that can be examined by the tester in order to verify that the product is operating properly. When multiple values for an observable are possible, this section provides a short discussion on how to interpret them. The determination of a pass or fail outcome for a particular test is generally based on the successful (or unsuccessful) detection of a specific observable.
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Agilent Technologies, Inc. REFERENCES This method of implementation document references the following texts: Serial ATA Revision 3.0 (SATA Revision 3.0) Serial ATA Interoperability Program Unified Test Document Revision 1.4 Serial ATA Interoperability Program Policy Document Revision 1.4 Serial ATA Interoperability Program Pre-Test MOI Revision 1.4 (Pre-Test MOI) Agilent Technologies, Inc. 10 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. PHY GENERAL REQUIREMENTS Overview: This group of tests verifies the Phy General Requirements, as defined in Section 2.13 of the Serial ATA Interoperability Unified Test Document, Revision 1.4 (which references Serial ATA Revision 3.0). Agilent Technologies, Inc. 11 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test PHY-01 - Unit Interval Purpose: To verify that the Unit Interval of the Product Under Test (PUT) TX signaling is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 29 – General Specifications Ibid, 7.2.2.1.3 – Unit Interval Ibid, 7.4.14 – SSC Profile SATA Interoperability Program Unified Test Document, 2.13.
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Agilent Technologies, Inc. Test Procedure: This parameter is covered by Agilent Technologies, Inc. N5411B automated SATA compliance software, revision 1.02 or later. Either “PASS” or “FAIL” is shown for the unit interval test in the report generated at the completion of the testing. Both Min and Max tests must pass to pass the unit interval test. Observable Results: • PHY-01a - Mean Unit Interval measured between 666.4333ps (min) to 670.2333ps (max) (for products running at 1.
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Agilent Technologies, Inc. Test PHY-02 – Frequency Long Term Accuracy Purpose: To verify that the long term frequency stability of the Products Under Test’s (PUT’s) transmitter is within the conformance limit. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 29 – General Specifications Ibid, 7.2.2.1.4 – TX Frequency Long Term Stability Ibid, 7.4.7 – Long Term Frequency Accuracy SATA Interoperability Program Unified Test Document, 2.12.
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Agilent Technologies, Inc. Test PHY-03 - Spread-Spectrum Modulation Frequency Purpose: To verify that the Spread Spectrum Modulation Frequency of the Products Under Test’s (PUT) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 29 – General Specifications Ibid, 7.2.2.1.5 – Spread-Spectrum Modulation Frequency Ibid, 7.4.14 – SSC Profile SATA Interoperability Program Unified Test Document, 2.13.
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Agilent Technologies, Inc. Test PHY-04 - Spread-Spectrum Modulation Deviation Purpose: To verify that the Spread-Spectrum Modulation Deviation of the Products Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 29 – General Specifications Ibid, 7.2.2.1.6 and 7.3.3 – Spread-Spectrum Modulation Deviation Ibid, 7.4.14 – SSC Profile SATA Interoperability Program Unified Test Document, 2.13.
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Agilent Technologies, Inc. Observable Results: a) Max SSCtol measured (using mean of 10 recorded values) less than +350ppm. b) Min SSCtol measured (using mean of 10 recorded values) greater than -5350ppm. Possible Problems: Some products may not support disconnect during the process of enabling BIST and testing. For these products, refer to the Disconnect sections of reference [5] for setup requirement. Agilent Technologies, Inc. 17 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. PHY TRANSMIT SIGNAL REQUIREMENTS Overview: This group of tests verifies the Phy Transmitted Signal Requirements, as defined in Section 2.15 of the Serial ATA Interoperability Unified Test Document, Revision 1.4 (which references Serial ATA Revision 3.0). Agilent Technologies, Inc. 18 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test TSG-01 - Differential Output Voltage Purpose: To verify that the Differential Output Voltage of the Products Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.7 – TX Differential Output Voltage Ibid, 7.4. 5 – Transmitter Amplitude SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. (MFTP lower), DHM (worst-case differential HFTP or differential MFTP), A (LBP lone 1-bit upper) and B (LBP lone 0-bit lower) are measured and computed to determine the final Vtest value for the Minimum Amplitude test. These interim values and screen captures can also be a helpful aid in debugging which pattern, and specifically, which bit failed the test. Similar steps are used to setup the MFTP and LFTP patterns used for the Maximum Amplitude test.
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Agilent Technologies, Inc. Test TSG-02 - Rise/Fall Time Purpose: To verify that the Rise/Fall time of the Products Under Test’s (PUT’s) is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.9 – TX Rise/Fall Time Ibid, 7.4.4 – Rise and Fall Times SATA Interoperability Program Unified Test Document, 2.15.2 – Rise/Fall Time Pre-Test MOI Resource Requirements: Same as for TSG-01. See appendix A for details.
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Agilent Technologies, Inc. Possible Problems: Some products may not support disconnect during the process of enabling BIST and testing. For these products, refer to the Disconnect sections of reference [5] for setup requirement. Agilent Technologies, Inc. 22 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test TSG-03 - Differential Skew Purpose: To verify that the Differential Skew of the Products Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.10 – TX Differential Skew (Gen2i, Gen1x, Gen2x) Ibid, 7.4.15 – Intra-pair Skew SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Observable Results: The TX Differential Skew shall be between the limits specified in reference [1]. For convenience, the values are reproduced below. PUT Type Gen1i Gen2i Max Diff Skew 20 ps 20 ps Possible Problems: Some products may not support disconnect during the process of enabling BIST and testing. For these products, refer to the Disconnect sections of reference [5] for setup requirement. Agilent Technologies, Inc. 24 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test TSG-04 - AC Common Mode Voltage Purpose: To verify that the AC Common Mode Voltage of the Products Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.11 – TX AC Common Mode Voltage (Gen2i, Gen1x, Gen2x) Ibid, 7.4.20 – TX AC Common Mode Voltage SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test TSG-05 - Rise/Fall Imbalance (Obsolete) Purpose: To verify that the Rise/Fall Imbalance of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.22.16 – TX Rise/Fall Imbalance Ibid, 7.4.19 – TX Rise/Fall Imbalance SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test TSG-06 - Amplitude Imbalance (Obsolete) Purpose: To verify that the Amplitude Imbalance of the Products Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.17 – TX Amplitude Imbalance (Gen2i, Gen1x, Gen2x) Ibid, 7.4.18 – TX Amplitude Imbalance SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Possible Problems: Some products may not support disconnect during the process of enabling BIST and testing. For these products, refer to the Disconnect sections of reference [5] for setup requirement. Agilent Technologies, Inc. 28 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test TSG-07 - Gen1 (1.5Gbps) TJ at Connector, Clock to Data, Fbaud/10 (Obsolete) Note: This test is no longer required. It has been left here only for historical reference. Purpose: Data-to-Data jitter is a measure of variance in the zero crossing times of edges at a fixed time (tn) equal to an integer number of Unit intervals (n) after triggering on data edges (t0).
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Agilent Technologies, Inc. Test TSG-09 - Gen1 (1.5Gbps) TJ at Connector, Clock to Data, Fbaud/500 (JTF Defined) Purpose: To verify that the TJ at Connector (Clock to Data, Fbaud/500) of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.18 Ibid, 7.3.2, 7.4.8 SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test TSG-10 - Gen1 (1.5Gbps) DJ at Connector, Clock to Data, Fbaud/500 (JTF Defined) Purpose: To verify that the DJ at Connector (Clock to Data, Fbaud/500) of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.18 Ibid, 7.3.2, 7.4.8 SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test TSG-11 - Gen2 (3.0Gbps) TJ at Connector, Clock to Data, Fbaud/500 (JTF Defined) Purpose: To verify that the TJ at Connector (Clock, 500) of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.18 Ibid, 7.3.2, 7.4.8 SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test TSG-12 - Gen2 (3.0Gbps) DJ at Connector, Clock to Data, Fbaud/500 (JTF Defined) Purpose: To verify that the DJ at Connector (Clock, 500) of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.18 Ibid, 7.3.2, 7.4.8 SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test TSG-13 - Gen3 (6.0Gbps) Transmit Jitter before and after CIC, Clock to Data (JTF Defined) Purpose: To verify that the TJ of the product’s transmitter is within the conformance limits, both at the near-end connector compliance point and at the far-end of the Compliance Interconnect Channel (CIC). References: [1] [2] [3] [4] [5] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.18 Ibid, 7.3.2.4, 7.4.8, 7.4.
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Agilent Technologies, Inc. This parameter is covered by Agilent Technologies, Inc. N5411B automated SATA compliance software, revision 1.02 or later. Either “PASS” or “FAIL” is shown for the 6Gb/s TJ test in the report generated at the completion of the testing. Observable Results: • RJ measured (RJmeas) at a maximum of 0.
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Agilent Technologies, Inc. Test TSG-14 - Gen3 (6.0Gbps) Transmitter Maximum Differential Voltage Amplitude Purpose: To verify that the Maximum Amplitude of the product’s transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.7 Ibid, 7.4.3, 7.4.5 SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. 1. The N5411B SATA compliance software will prompt for MFTP when needed. When prompted, follow the procedures in reference [5] to enable those BIST-TAS patterns. Or keep products in BIST-L. 2. Plug the test fixture into the products. The test fixture is connected to channels 1 and 3 of the scope by two 36” SMA cables (Rosenberger or equivalent). OBSERVE the signal on the scope. If it is correct, press OK in the N5411B prompt.
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Agilent Technologies, Inc. Test TSG-15 - Gen3 (6.0Gbps) Transmitter Minimum Differential Voltage Amplitude Purpose: To verify that the Minimum Amplitude of the product’s transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.7 Ibid, 7.3.2.4, 7.4.3 SATA Interoperability Program Unified Test Document, 2.15.
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Agilent Technologies, Inc. Test Setup: 1. The N5411B SATA compliance software will prompt for LBP when needed. When prompted, follow the procedures in reference [5] to enable those BIST-TAS patterns. Or keep products in BIST-L. 2. Plug the test fixture into the products. The test fixture is connected to channels 1 and 3 of the scope by two 36” SMA cables (Rosenberger or equivalent). OBSERVE the signal on the scope. If it is correct, press OK in the N5411B prompt.
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Agilent Technologies, Inc. Test TSG-16 - Gen3 (6.0Gbps) Transmitter AC Common Mode Voltage Purpose: To verify that the AC Common Mode Voltage of the product’s transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements Ibid, 7.2.2.2.12 Ibid, 7.4.21 SATA Interoperability Program Unified Test Document, 2.15.16 – Gen3(6Gb/s) AC Common Mode Voltage [5] Pre-Test MOI Resource Requirements: Same as for TSG-01.
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Agilent Technologies, Inc. Test Setup: 1. The N5411B SATA compliance software will prompt for HFTP when needed. When prompted, follow the procedures in reference [5] to enable those BIST-TAS patterns. Or keep products in BIST-L. 2. Plug the test fixture into the products. The test fixture is connected to channels 1 and 3 of the scope by two 36” SMA cables (Rosenberger or equivalent). OBSERVE the signal on the scope. If it is correct, press OK in the N5411B prompt.
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Agilent Technologies, Inc. PHY OOB REQUIREMENTS Overview: This group of tests verifies the Phy OOB Requirements, as defined in Section 2.18 of the SATA Interoperability Unified Test Document, v1.4 (which references the Serial ATA Revision 3.0). Agilent Technologies, Inc. 42 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test OOB-01 – OOB Signal Detection Threshold Purpose: To verify that the OOB Signal Detection Threshold of the Product Under Test’s (PUT’s) receiver is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.2 Ibid, 7.4.24 SATA Interoperability Program Unified Test Document, 2.18.
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Agilent Technologies, Inc. TX+ signal that will be delivered to the RX+ input on the products. The remaining 81134A data outputs, Channel 1 negative (-) and Channel 2 positive (+) are mixed together and delivered to the RX- input on the products through the Crescent Heart Software TF-SATA-NE/ZP or TF-eSATA-NE/ZP test adapter or equivalent. The OOB Tests are designed to be run concurrently for simplicity.
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Agilent Technologies, Inc. When the 40mV of differential OOB amplitude is needed at the products receiver, then insert the 8493C-020 20dB passive attenuators here, one on each of the 11636B power divider outputs, before the SMA cable is attached. The voltage output of the 81134A after the attenuator is now 10 times lower than the voltage selection on the 81134A output. The sensitivity of the adjustment is now 0.1mV instead of 1mV with the “divide-by-10” attenuator in place.
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Agilent Technologies, Inc. Example Typical products behavior for in specification COMINIT/COMRESET sequence at 210mV In this figure, the products correctly responds to a valid in-spec COMRESET/COMWAKE OOB initialization sequence at 210mV, thus passing the threshold test. The other requirement for passing is to successfully REJECT the same HOST OOB signal sent at 40mV (for Gen 1i) or 60mV (for Gen 2i). Agilent Technologies, Inc. 46 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc.
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Agilent Technologies, Inc. Test OOB-02 – UI During OOB Signaling Purpose: To verify that the UI During OOB Signaling of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.3 Ibid, 7.4.14 SATA Interoperability Program Unified Test Document, 2.18.
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Agilent Technologies, Inc. Test OOB-03 – COMINIT/RESET and COMWAKE Transmit Burst Length Purpose: To verify that the COMINIT/RESET and COMWAKE Transmit Burst Length of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.4 Ibid, 7.4.2251 SATA Interoperability Program Unified Test Document, 2.18.
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Agilent Technologies, Inc. Test OOB-04 – COMINIT/RESET Transmit Gap Length Purpose: To verify that the COMINIT/RESET Transmit Gap Length of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.5 Ibid, 7.4.25 SATA Interoperability Program Unified Test Document, 2.17.4 – COMINIT/RESET Transmit Gap Length Resource Requirements: Same as for OOB-02.
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Agilent Technologies, Inc. Example N5411B OOB Output Report: This is a section of the HTML output report that illustrates and quantifies the COMINIT and COMWAKE Transmit Gap Lengths. Agilent Technologies, Inc. 51 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test OOB-05 – COMWAKE Transmit Gap Length Purpose: To verify that the COMWAKE Transmit Gap Length of the Product Under Test’s (PUT’s) transmitter is within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.6 Ibid, 7.4.25 SATA Interoperability Program Unified Test Document, 2.18.5 – COMWAKE Transmit Gap Length Resource Requirements: Same as for OOB-02.
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Agilent Technologies, Inc. Example N5411B OOB Output Report: This is a section of the HTML output report that illustrates and quantifies the COMINIT and COMWAKE Transmit Gap Lengths. Agilent Technologies, Inc. 53 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Test OOB-06 – COMWAKE Gap Detection Windows Purpose: To verify that the COMWAKE Gap Detection Windows of the Product Under Test’s (PUT’s) receiver are within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.7 Ibid, 7.4.25 SATA Interoperability Program Unified Test Document, 2.18.6 –COMWAKE Gap Detection Windows Resource Requirements: Same as for OOB-02. See Appendix A for details.
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Agilent Technologies, Inc. Example Typical products behavior for nominal COMINIT/COMRESET and COMWAKE gaps: Agilent Technologies, Inc. 55 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Example of products’s response to out of specification COMINIT/COMRESET and COMWAKE gaps: Possible Problems: NOTE : There is no timing requirement for how soon following a products COMWAKE which the products must respond with a products COMWAKE. For test efficiency purposes, a tester is only required to wait for verification of products COMWAKE up to 100ms following de-qualification of products COMWAKE. Agilent Technologies, Inc. 56 SATA PHY, TSG & OOB Test MOI v.1.
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Agilent Technologies, Inc. Test OOB-07 – COMINIT Gap Detection Windows Purpose: To verify that the COMINIT Gap Detection Windows of the Product Under Test’s (PUT’s) receiver are within the conformance limits. References: [1] [2] [3] [4] Serial ATA Revision 3.0, 7.2.1, Table 34 – OOB Specifications Ibid, 7.2.2.6.8 Ibid, 7.4.25 SATA Interoperability Program Unified Test Document, 2.18.7 – COMINIT Gap Detection Windows Resource Requirements: Same as for OOB-02. See Appendix A for details.
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Agilent Technologies, Inc. Example Typical products behavior for in specification COMINIT gaps: Agilent Technologies, Inc. 58 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Example of products’s response to out of specification COMINIT gaps: Possible Problems: NOTE: A products must respond by transmitting COMINIT within 10ms of de-qualification of a received COMRESET signal (see section 8.4 of Serial ATA Revision 2.6). With this in mind, a test only needs to wait up to 11ms following de-qualification of COMRESET to ensure that the products is responding.
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Agilent Technologies, Inc. Appendix A – Information on Required Resources Equipment referred to in this document is described here, or references to available resources are cited. Information on the Agilent DSAX93204A, DSAX92804A, DSAX92504A, DSAX92004A and DSAX91604A Infiniium 32GHz, 28GHz, 25GHz, 20GHz and 16GHz real time oscilloscopes, and Agilent DSA91204A Infiniium 12GHz real time oscilloscopes and 30GHz InfiniiMax active voltage probes can be found at: http://www.agilent.
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Agilent Technologies, Inc. A picture of the Crescent Heart Software TF-SATA-NE/ZP or TF-eSATA-NE/ZP test adapter or equivalent is shown below for reference. The TF-SATA-NE/ZP has four SMA(f) connectors labeled appropriately to connect to Host TX+ (HT+), Host TX- (HT-), Host RX+ (HR+) and Host RX- (HR-). Information about the Crescent Heart Software test fixtures can be obtained from their website at: http://www.c-h-s.com/tf-sata.
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Agilent Technologies, Inc. Information about SerialTek BusMod BusGen BIST Generator as an alternate BIST mode and pattern generation tool can be found from their website at: http://www.serialtek.com/busmod_sassata_errorinjector.asp Example N5411B Product Test Initial Setup Procedure 1. To start the N5411B Application, invoke it from the Analyze->Automated Test Apps->SATA menu tree in the Infiniium Oscilloscope interface. Agilent Technologies, Inc. 62 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 2. Next, choose the type of products that you wish to test and associate the 81134A Programmable Pattern Generator LAN connection with the N5411B SATA application. 3. 2) Select Gen II (3.0Gbps) 1) Select Device Type 3) Select i (internal cable interface) 6) Get IDN 5) Enter the 81134A IP address 4) Select Configure Device Agilent Technologies, Inc. 63 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 4. Then, click on the “Select Tests” tab and choose the tests that you would like to run. If all tests are desired to be run, then only the top of the main tree needs to be selected. Only the tests for your products/PUT type and speed are shown in the tree based on your inputs from the previous setup step. 5. Next click on the “Configure Tab” to verify proper setup of the application connection points. The SATA II: Electrical Specification 1.
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Agilent Technologies, Inc. Enable Far-End Retimed Loopback Then you’re ready to run your selected tests. You will be prompted to check the connection to your products, but we’ve already validated that above. 6. Next you will see each one of the tests being performed automatically by the application. A running total of completed tests and a summary of pass/failed tests is also provided. When completed you will see a summary of the test results. Agilent Technologies, Inc.
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Agilent Technologies, Inc. 7. Click on the “HTML Report” tab to view a more detailed summary of the testing that includes screen shots taken from the scope. Agilent Technologies, Inc. 66 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Appendix B – Cable Deskew Procedure This procedure must be performed before measurements are made, and whenever the skew between the positive and negative data input lines may have changed (i.e. cables have been disconnected and reconnected perhaps on the other side of the diff pair).
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Agilent Technologies, Inc. 5) Referring to the figure below, perform the following steps. a. Select the File Load Setup menu to open the Load Setup window. b. Navigate to the directory location that contains the INF_SMA_Deskew.set setup file. c. Select the INF_SMA_Deskew.set setup file by clicking on it. d. Click the Load button to configure the oscilloscope from this setup file. 1. Click File Load Setup 2. Then find and select INF_SMA_Deskew.set 3. Then click here to load setup file.
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Agilent Technologies, Inc. bottom trace provides for visual presentation of unwanted differential mode signal resulting from relative channel skew. Skew between Channel 1 and Channel 3 Differential signal not flat, indicating mismatch in skew. 8) Referring to the following figure, perform the following steps to deskew the channels. a. Click on the Setup Channel 1 menu to open the Channel Setup window. b. Move the Channel Setup window to the left so you can see the traces. c.
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Agilent Technologies, Inc. Purpose: To provide verification that the measurement instrument meets the Lab Load requirement of the SATA spec. References: [1] Serial ATA Revision 3.0, 7.2.2.4 Lab Load Details [2] SATA Interoperability Program Unified Test Document Last Modification: March 25, 2009 (Revision 1.02) Discussion: C.1 - Introduction The Serial ATA Revision 3.
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Agilent Technologies, Inc. Figure C.1a TDR Single-ended stimulus setup for Agilent 86100C DCA-J Figure C.1b TDR Differential stimulus setup for Agilent 86100C DCA-J Agilent Technologies, Inc. 71 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. C.2 – Measurement Results Figure C.2a shows the measured single-ended return loss of the laboratory load, showing that the response meets the specified limits of >20dB return loss from 100MHz to 5 GHz, and >10 dB from 5GHz to 8GHz for both channels 1 and 3 on the DSO81304B. Figure C.2b shows the measured differential return loss of the laboratory load. Figure C.
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Agilent Technologies, Inc. Figure C.2b Differential return loss measurement for Agilent’s DSO81304B laboratory load (including Rosenberger SMA cables and 11742A DC blocking capacitors) Agilent Technologies, Inc. 73 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. Appendix D - Measurement Accuracy Specifications Measurement: Accuracy: Accuracy Source: PHY-01 UI PHY-02 Long Term Freq PHY-03 SSC Freq PHY-04 SSC Dev 1.2 ps rms +/- 1ppm +/- 1ppm +/- 1ppm MFTP Measured Data Sheet Data Sheet Data Sheet TSG-01 Dif Out Volt TSG-02 Rise Fall Time TSG-03 Skew TSG-04 AC Com Mode 2.71mV at 800mVFull Screen <1ps rms <100fs rms <2mV rms at 800mV Full Screen Data Sheet TSG-05 Rise Fall Imb <1.5% TSG-06 Amp Imb TSG-07 Tj <0.
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Agilent Technologies, Inc. Appendix E – Calibration of Jitter Measurement Devices Purpose: To calibrate and verify the jitter measurement device (JMD) and associated test setup has a proper response to jitter and SSC. References: [1] SATA Specification Revision 3.0, Section 7.3.2 Resource requirements: Pattern Generator for SATA signals Sine wave source, 30kHz, and 0.5MHz to 50MHz. Test cables Jitter Measuring Device Last Template Modification: March 25, 2009 (Version 1.02) Discussion: See Reference [1].
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Agilent Technologies, Inc. Agilent Technologies, Inc. 76 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 2. Verify the level of modulation meets the requirements and record the p-p level, DJSSC. This is done with a Time Interval Error (TIE) type measurement or equivalent. Agilent Technologies, Inc. 77 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 3. Apply test signal to the JMD. Turn off the sinusoidal phase modulation. Record the reported DJ, DJSSCOFF. Agilent Technologies, Inc. 78 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 4. Turn on the sinusoidal phase modulation. Record the reported DJ, DJSSCON. 5. Calculate and record the level of measured DJ by subtracting the DJ with modulation off from DJ with modulation on, DJMSSC = DJSSCON - DJSSCOFF. Calculate the jitter attenuation by 20Log(DJMSSC / DJSSC). This value must fall within the range of –72dB +/- 3dB for Gen1 or Gen 2. The value must fall within the range of -38.2dB +/-3dB for Gen3. Adjust the JMD settings to match this requirement.
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Agilent Technologies, Inc. 6. Adjust the pattern generator for a D24.3 pattern (00110011) and modulation to produce a 50 MHz +/-1%, 0.3 UI p-p +/- 10% (200ps for Gen1i or 100ps for Gen2i or 50ps for Gen3i) sinusoidal phase modulation, also known as periodic jitter, PJ. Agilent Technologies, Inc. 80 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 7. Verify the level of modulation meets the requirements and record the p-p level, DJM. This is done with a Time Interval Error (TIE) type measurement or equivalent. Agilent Technologies, Inc. 81 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 8. Apply test signal to the JMD. Turn off the sinusoidal phase modulation. Record the reported DJ, DJMOFF. Agilent Technologies, Inc. 82 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 9. Turn on the sinusoidal phase modulation. Record the reported DJ, DJMON. 10. Calculate the difference in reported DJ for these two cases, DJMM = DJMON - DJMOFF Calculate the 3dB value: DJ3DB = DJMM * 0.707 Agilent Technologies, Inc. 83 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 11. Adjust the frequency of the PJ source to 2.1MHz for Gen1 or Gen2 calibration, 4.2MHz for Gen3 calibration Agilent Technologies, Inc. 84 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.
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Agilent Technologies, Inc. 12. Measure the reported DJ difference between PJ on versus PJ off DJ = DJON - DJOFF and compare to the (DJ -3dB) value, DJ3DB. Shift the frequency of the PJ source until the reported DJ difference between PJ on versus PJ off is equal to (DJ -3dB). The PJ frequency is the -3dB BW of the JTF; record this value F3DB. 13. Adjust the JMD settings to bring the PJ –3dB frequency to 2.1MHz +/- 1MHz for Gen1 or Gen2 calibration, 4.2MHz +/- 1MHz for Gen3 calibration.
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Agilent Technologies, Inc. 14. Check the peaking of the JTF. Adjust the pattern generator for a D24.3 pattern and modulation to produce sinusoidal phase modulation (PJ) at the –3dB BW frequency found above, and 0.3 UI p-p +/- 10% (200ps for Gen1i or 100ps for Gen2i or 50ps for Gen3i). Increase the frequency of the modulation to find the maximum reported DJ; it is not necessary to increase beyond 20MHz. Measure the reported DJ difference between PJ on versus PJ off, DJPK = DJPKON - DJPKOFF.
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Agilent Technologies, Inc. Worksheet Results Example for Gen1/2 JTF Calibration Agilent Technologies, Inc. 87 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.