Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 96 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.5.8.4 PCR Control register
The Control register is used to perform a firmware reset and clear wake-up conditions in
the Status register.
8.5.8.5 PCR Status register
The PCR Status register stores the state of the 8 wake-up events, reported within 7 flags.
Remark: The following status bits are not masked by the corresponding enable bit of the
PCR Wakeupen register (see Table 143
). But if not enabled, the event does not wake-up
the PN532.
Remark: Be careful when handling the status register, not all the status events are
latched. Therefore it be possible that the status register does not indicate any wake-up
event when reading this register after wake-up.
Remark: There is no priority management. More than one wake-up event may be
signalled in the register. Therefore it may not be possible to detect the source of the
wake-up event by reading this register.
An event on a given wake-up condition is flagged by a logic 1 in the associated bit field.
Table 139. PCR Control register (address 6203h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol - - - - - - clear_wakeup_cond soft_reset
Reset 110000 0 0
Access RRRRRR R/W R/W
Table 140. Description of PCR Control bits
Bit Symbol Description
7 to 2 - Reserved.
1 clear_wakeup_cond Clears value of wakeupcond in Status register. When set to
logic 1, wake-up conditions stored in PCR Status register are set to
logic 0. Bit is set to logic 0 automatically by hardware.
0soft_reset Initiates a firmware reset. When set to logic 1, system goes into
firmware reset mode. Bit is set to logic 0 automatically by hardware
after performing firmware reset sequence.
Table 141. PCR Status register (address 6204h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol i
2
c_wu gpirq_wu SPI_wu HSU_wu CIU_wu - int1_wu int0_wu
Reset 00000000
Access RRRRRRRR