Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 87 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.4.1.3 LDO without offset
The LDO generates DVDD but any voltage fluctuation on VBAT is not compensated for.
When RSTPD_N is high and PVDD is above 1.6 V, this voltage is defined by:
• VBAT > 3.0V: DVDD = 3 V.
• 3.0V > VBAT > 2.35V: DVDD = VBAT.
• 2.35V > VBAT=DVDD and the PN532 is in reset.
When in Soft-Power-Down mode, the behavior is the same as that with offset. See
Figure 22 on page 86
.
8.4.1.4 LDO overcurrent detection
The LDO integrates an overcurrent detector. When the current on VBAT exceeds a
programmable threshold, an error bit is set. See Table 126 on page 88
. If IE1_0 is set to
logic 1 (see Table 13 on page 18
), an 80C51 interrupt will be asserted when an
overcurrent is detected.
Fig 23. Graph of DVDD versus VBAT without offset
3.3V
3.0V
2.35V
VBAT
DV
DD
5.5V
LDO current consumption
few mA
<5 uA