Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 84 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.4 Power management
Figure 19 “Power management scheme” depicts the internal and external power
distribution management. Power is supplied to the PN532 via pins VBAT and PVDD.
VBAT is driven by the battery and is used to supply the all blocks excluding the host
interface. PVDD is connected to the host’s power supply and powers the PN532’s host
interface. No specific sequencing is required between the two supply rails: VBAT can be
present without PVDD and vice versa.
An internal low drop-out (LDO) voltage regulator generates DVDD and SVDD, which are
used to supply the internal digital logic and the secure IC respectively. DVDD is also
routed externally to supply AVDD (analog power) and TVDD (transmit power). DVDD,
AVDD and TVDD must be separately decoupled.
When another host interface than SPI is used, the PN532 can be used with reduced
functionalities; all functionalities, except those related to the PVDD supplied pins (like host
interfaces) when:
PVDD < 0.4V
5.5V > VBAT > 2.7V
3.6V > RSTPD_N > VBAT * 0.65
Fig 19. Power management scheme
4.7  F
100nF
DVDD
AVDD
TVDD
PN532
VBAT
Low DropOut
PVDD
HOST
VDD
VDDHOST (1.6V -> 3.6V)
VBAT PN532 (2.7V -> 5.5V)
Secure
SVDD
4.7  F
100nF
100nF
IC
SVDD switch
regulator
LDO
Power distribution
RSTPD_N
internal DVDD