Datasheet

Table Of Contents
PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 75 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.3.4.1 Mode of operation
The HSU supports only one operational mode, which has the following characteristics:
Start bit:
Start bit is detected when a logic 0 is asserted on the HSU_RX line.
8 data bits:
The data bits are sent or received LSB first.
Stop bit:
During reception, the Stop bit(s) is detected when all the data bits are received and
when Stop bit(s) is sampled to logic 1. The number of Stop bits is programmable. It
can be 1 or 2.
During Transmission, after the complete data bit transmission, a variable number
of Stop bit(s) is transmitted. This number is programmable from 1 to 4.
8.3.4.2 HSU Baud rate generator
To reach the high speed transfer rate, the HSU has it own baud rate generator. The baud
rate generator comprises a prescaler and a counter. The prescaler is located before the
counter. The purpose of the prescaler is to divide the frequency of the count signal to
enlarge the range of the counter (at the cost of a lower resolution). The division factor of
the prescaler is equal to 2 to the power HSU_PRE[8:0] (Table 113 on page 77
), resulting
in division factors ranging from 1 (20) to 256 (28). The combination of these 2 blocks
defines the bit duration and the bit sampling.
8.3.4.3 HSU preamble filter
Received characters are sent to the FIFO manager after three consecutive characters
have been received: 00 00 FF. When the frame is finished, and before a new frame
arrives, firmware shall write a logic 1 in the start_frame bit of the HSU_CTR register to
re-activate the preamble filter. If firmware does not write a logic 1 then all characters of the
frame are sent to the FIFO manager (including the preamble).