Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 47 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.2.2.6 P3 register
Table 70. P3 register (SFR: address B0h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol - - P3[5] P3[4] P3[3] P3[2] P3[1] P3[0]
Reset 11111111
Access R R R/W R/W R/W R/W R/W R/W
Table 71. Description of P3 bits
Bit Symbol Description
7 to 6 - Reserved.
5 P3[5] Writing to P3[5] writes the corresponding value to P35 pin according to the
configuration mode defined by P3CFGA[5] and P3CFGB[5].
Reading from P3[5] reads the state of P35 pin.
4 P3[4] When P34 alternate function SIC_CLK is not used, writing to P3[4] writes the
corresponding value to P34 pin according to the configuration mode defined by
P3CFGA[4] and P3CFGB[4].
Reading from P3[4] reads the state of P34 pin.
3 P3[3] Writing to P3[3] writes the corresponding value to P33_INT1 pin according to
the configuration mode defined by P3CFGA[3] and P3CFGB[3].
Reading from P3[3] reads the state of P33_INT1 pin.
2 P3[2] Writing to P3[2] writes the corresponding value to P32_INT0 pin according to
the configuration mode defined by P3CFGA[2] and P3CFGB[2].
Reading from P3[2] reads the state of P32_INT0 pin.
1 P3[1] When the P31 pin alternate function UART_TX is not used, writing to P3[1]
writes the corresponding value to P31 pin according to the configuration mode
defined by P3CFGA[1] and P3CFGB[1].
Reading from P3[1] reads the state of P31 pin.
0 P3[0] When the P30 pin alternate function UART_RX is not used, writing to P3[0]
writes the corresponding value to P30 pin according to the configuration mode
defined by P3CFGA[0] and P3CFGB[0].
Reading from P3[0] reads the state of P30 pin.