Datasheet

Table Of Contents
PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 36 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.1.8.7 Mode 1 and 3 baud rates
In modes 1 and 3, the baud rates are determined by the rate of timer1 and timer2 overflow
bits: ‘t1_ovf’ and ‘t2_ovf’. The register bit TCLK0 from the register T2CON selects if
‘t1_ovf’ or ‘t2_ovf’ should be used as a source when transmitting. The register bit RCLK0
from the register T2CON selects if ‘t1_ovf’ or ‘t2_ovf’ should be used as a source when
receiving. The timers interrupt should be disabled when used to define the Debug UART
baud rates.
The data rate is also dependant on the value of the bit SMOD from the SFR register
PCON.
If over1rate is the equivalent ‘t1_ovf’ frequency and over2rate is the equivalent ‘t2_ovf’
frequency then:
Baud rate in mode 1 and 3 when related to timer1 overflow
(3)
See also Section 8.1.8.8 “Baud rates using Timer1 (Debug UART mode 1 and 3)
Baud rate in mode 1 and 3 when related to timer2 overflow
(4)
See also Section 8.1.8.9 “Baud rates using Timer2 (Debug UART mode 1 and 3)
The next table shows the trigger select:
8.1.8.8 Baud rates using Timer1 (Debug UART mode 1 and 3)
The Timer1 interrupt should be disabled in this application. The Timer1 itself can be
configured for either ‘timer’ or ‘counter’ operation, and in any of its 3 running modes. In the
most typical applications, it is configured for ‘timer’ operation, in the auto-reload mode
(Timer1 mode 2: high nibble of T01MOD = 0010b). In that case the baud rate is given by
the formula:
Baud rate
(5)
Table 55. Trigger select
RCLK0 TCLK0 SMOD receive trigger rate transmit trigger rate
0 - 0 over1rate/32 -
0 - 1 over1rate/16 -
1 - - over2rate/16 -
- 0 0 - over1rate/32
- 0 1 - over1rate/16
- 1 - - over2rate/16
2
SMOD
32
----------------
over1rate
1
16
------
over2rate
2
SMOD
32
----------------
f
clk
6 256 T1H
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