Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 33 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.1.8.3 S0CON register
The Special Function Register S0CON is the control and status register of the Debug
UART. This register contains the mode selection bits (SM2, SM1, SM0), the 9th data bit
for transmit and receive (TB8 and RB8), and the serial port interrupt bits (TI and RI).
Table 48. Debug UART S0CON register (SFR: address 98h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol SM0 SM1 SM2 REN TB8 RB8 TI RI
Reset 00000000
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 49. Description of S0CON bits
Bit Symbol Description
7 to 6 SM (0:1) Mode selection bit 0 and 1. Set by firmware only. The Debug UART has 4
modes (Table 50 “
Debug UART modes” on page 34).
5SM2Multi-processor communication enable.
Enables the multi-processor communication feature. Set by firmware only.
In mode 2 and 3:
if SM2 is set to logic 1, then RI will not be activated and RB8 and S0BUF will
not be loaded if the 9th data bit received is a logic 0
if SM2 is set to logic 0, it has no influence on the activation of RI and RB8
In mode 1:
if SM2 is set to logic 1, then RI will not be activated and RB8 and S0BUF will
not be loaded if no valid stop bit was received
if SM2 is set to logic 0, it has no influence on the activation of RI and RB8
In mode 0, SM2 has no influence
4RENSerial reception enable. Set by firmware only.
When set to logic 1, enables reception.
3TB8Transmit data bit. Set by firmware only.
In modes 2 and 3, the value of TB8 is transmitted as the 9th data bit
In modes 0 and 1, the TB8 bit is not used