Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 205 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
12.16 Input/output pin characteristics for MISO / P71 and SCK / P72
[1] To minimize power consumption when in Soft-Power-Down mode, the limit is PV
DD
- 0.4 V.
[2] To minimize power consumption when in Soft-Power-Down mode, the limit is 0.4 V.
[3] Data at PVDD= 1.8 V are only given from characterization results.
12.17 Input pin characteristics for SIGIN
[1] To minimize power consumption when in Soft-Power-Down mode, the limit is SV
DD
- 0.4 V.
[2] To minimize power consumption when in Soft-Power-Down mode, the limit is 0.4 V.
Table 311. Input/output pin characteristics for MISO / P71 and SCK / P72
Symbol Parameter Conditions Min Typ Max Unit
V
IH
High level Input voltage
[1]
0.7  PV
DD
PV
DD
V
V
IL
Low level Input voltage
[2]
00.3 PV
DD
V
V
OH
Push_pull / MISO mode
high level output voltage
PV
DD
=3V,
I
OH
=-4mA
PV
DD
-0.4 PV
DD
V
PV
DD
=1.8 V,
I
OH
=-2mA
[3]
PV
DD
-0.4 PV
DD
V
V
OL
Push_pull / MISO mode
low level output voltage
PV
DD
=3V,
I
OL
=-4mA
00.4V
PV
DD
=1.8 V,
I
OL
=-2mA
[3]
00.4V
I
IH
Input mode high level input
current
V
I
=DV
DD
-1 1 A
I
IL
Input mode low level input
current
V
I
=0V -1 1 A
I
Leak
Input leakage current RSTPD_N = 0.4 V -1 1 A
C
in
Input Capacitance 2.5 pF
C
out
Load Capacitance 30 pF
T
SP
Width of suppressed
spikes
Only valid for SCK 15 ns
Table 312. Input/output pin characteristics for SIGIN
Symbol Parameter Conditions Min Typ Max Unit
V
IH
High level Input voltage
[1]
0.7  SV
DD
SV
DD
V
V
IL
Low level Input voltage
[2]
00.3 SV
DD
V
I
IH
High level input current V
I
=SV
DD
-1 1 A
I
IL
Low level input current V
I
=0V -1 1 A
I
Leak
Input leakage current RSTPD_N = 0.4 V -1 1 A
C
in
Input Capacitance 2.5 pF