Datasheet

Table Of Contents
PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 185 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.53 CIU_AnalogTest register (6328h)
Controls the pins AUX1 and AUX2.
Table 278. CIU_AnalogTest register (address 6328h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol AnalogSelAux1[3:0] AnalogSelAux2[3:0]
Reset 00000000
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 279. Description of CIU_AnalogTest bits
Bit Symbol Description
7 to 4 AnalogSelAux1[3:0] Controls the AUX1 pin. Note: All test signals are described in
Section 8.6.21.3 “
Test signals at pin AUX” on page 142.
0000 Tristate
0001 DAC output: register CIU_TestDAC1
[1]
0010 DAC output: test signal corr1
[1]
0011 DAC output: test signal corr2
[1]
0100 DAC output: test signal MinLevel
[1]
0101 DAC output: ADC_I
[1]
0110 DAC output: ADC_Q
[1]
0111 DAC output: ADC_I combined with ADC_Q
[1]
1000 Test signal for production test
1001 secure IC clock
1010 ErrorBusBit as described in Table 177 on page 145
1011 Low
1100 TxActive
At 106 kbit/s: High during Start bit, Data bits, Parity and
CRC
At 212 kbit/s and 424 kbit/s: High during Preamble, Sync,
Data bits and CRC
1101 RxActive
At 106 kbit/s: High during Data bits, Parity and CRC
At 212 kbit/s and 424 kbit/s: High during Data bits and CRC
1110 Subcarrier detected
At 106 kbit/s: not applicable
At 212 kbit/s and 424 kbit/s: High during last part of
preamble, Sync, Data bits and CRC.
1111 Test bus bit as defined by the TstBusBitSel in Table 265 on
page 181