Datasheet

Table Of Contents
PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 180 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.43 CIU_TReloadVal_lo register (631Dh)
Defines the LSB of the 16 bit long timer reload value.
8.6.23.44 CIU_TCounterVal_hi register (631Eh)
Defines the MSB byte of the current value of the timer.
8.6.23.45 Register CIU_TCounterVal_lo (631Fh)
Defines the LSB byte of the current value of the timer.
Table 258. CIU_TReload_lo register (address 631Dh) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol TReloadVal_Lo[7:0]
Reset 00000000
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 259. Description of CIU_TReload_lo bits
Bit Symbol Description
7 to 0 TReloadVal_Lo[7:0] Defines the lower 8 bits for the TReloadValue.
With a start event the timer loads with the TReloadValue. Changing
this register affects the timer only with the next start event.
Note: The reload value is defined with TReloadVal_Lo[7:0] in this
register and TReloadVal_Hi[7:0] in CIU_TReload_Hi.
Table 260. CIU_TCounterVal_hi register (address 631Eh) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol TCounterVal_Hi[7:0]
Reset xxxxxxxx
Access RRRRRRRR
Table 261. Description of CIU_TCounterVal_hi bits
Bit Symbol Description
7 to 0 TCounterVal_Hi[7:0] MSB of the current value of the timer (Higher 8 bits).
Table 262. CIU_TCounterVal_lo register (address 631Fh) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol TCounterVal_LO[7:0]
Reset xxxxxxxx
Access RRRRRRRR
Table 263. Description of CIU_TCounterVal_lo bits
Bit Symbol Description
7 to 0 TCounterVal_LO[7:0] LSB of the current value of the timer (Lower 8 bits).