Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 178 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.40 CIU_TMode register (631Ah)
Defines settings for the internal timer.
Table 252. CIU_TMode register (address 631Ah) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol TAuto TGated[1:0] TAutoRestart TPrescaler_Hi[3:0]
Reset 0 00 0 0000
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 253. Description of CIU_TMode bits
Bit Symbol Description
7 TAuto Set to logic 1, the timer starts automatically at the end of the
transmission in all communication modes at all speed, or when
InitialRFOn (in CIU_TxAuto) is set to logic 1 and the external RF field
is switched on. The timer stops immediately after receiving the first
data bit if RxMultiple in the CIU_RxMode register is set to logic 0.
If RxMultiple is set to logic 1, the timer never stops. In this case the
timer can be stopped by setting the bit TStopNow in register
CIU_Control to 1.
Set to logic 0 indicates, that the timer is not influenced by the
protocol.
6 to 5 TGated[1:0] The internal timer is running in gated mode.
Note: In the gated mode, the bit TRunning is logic 1 when the timer is
enabled by the register bits. This bit does not influence the gating
signal
Value Description
00 No gated mode
01 Gated by SIGIN
10 Gated by AUX1
11 Reserved
4 TAutoRestart Set to logic 1 the timer automatically restart its count-down from
TReloadValue defined within when reaches zero.
Set to logic 0 the timer decrements to zero and the bit TimerIRq is set
to logic 1.
3 to 0 TPrescaler_Hi[3:0] Defines higher 4 bits for the TPrescaler.
The following formula is used to calculate f
Timer
:
For detailed description see Section 8.6.17 “
CIU_timer” on page 130.
Note: TPreScaler is defined with TPreScaler_Hi[3:0] in this register
and TPreScaler_LO[7:0] in CIU_TPrescaler.
f
Timer
6,78MHz T
PreSca ler
=