Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 174 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.35 CIU_TxBitPhase register (6315h)
Adjust the bit phase at 106 kbit/s during transmission.
Table 242. CIU_TxBitPhase register (address 6315h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol RcvClkChange TxBitPhase[6:0]
Reset 1 0000111
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 243. Description of CIU_TxBitPhase bits
Bit Symbol Description
7 RcvClkChange Set to logic 1, the demodulator’s clock is derived from the external RF
field.
6 to 0 TxBitPhase[6:0] TXBitPhase[6:0] in addition with TxWait bits (register 63 0Ch), define a
delay to adjust the bit synchronization during Passive Communication
mode at 106 kbit/s and in ISO/IEC 14443A/MIFARE Reader/Writer
mode. TxBitphase[6:0] are representing a delay in number of carrier
frequency clock cycles.
Note: The ranges to be used for TxWait[1:0] and TxBitPhase[6:0] are
between:
TXWait=01b and TxBitPhase = 1Bh (equivalent to an added delay of
20 clock cycles) and TXWait=01b and TxBitPhase = 7Fh (equivalent to
an added delay of 120 clock cycles)
TxWait=10b and TxBitPhase = 00h (equivalent to an added delay of
121 clock cycles) and TxWait=10b and TxBitPhase = 0Fh (equivalent
to an added delay of 136 clock cycles)
Note: The delay can vary depending of antenna circuits.
Note: When DriverSel = 01b (the transmitter modulation input is
coming from the internal coder), this delay is added to the waiting
period before transmitting data in all communication modes.
Note: When SigoutSel=1110b (CIU_TxSel register), and DelayMF_SO
=1b (CIU_ManualRCV register), this delay is added on SIGOUT.
Note: II the Signal at SIGIN is 128/fc faster compared to the ISO/IEC
14443A restrictions on the RF-Field for the Frame Delay Time, this
delay is made so that if the FDT is correct when DriverSel = 01b, the
same values of TxWait[1:0] and TxBitPhase[6:0] are also correct for
this configuration when DriverSel = 10b (the transmitter modulation
input is coming from SIGIN).