Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 171 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.31 CIU_CRCResultMSB register (6311h)
Shows the actual MSB values of the CRC calculation.
Note: The CRC is split into two 8-bit registers. See also the CIU_CRCResultLSB register.
Note: Setting the bit MSBFirst in CIU_Mode register reverses the bit order, the byte order
is not changed
8.6.23.32 CIU_CRCResultLSB register (6312h)
Shows the actual LSB values of the CRC calculation.
Note: The CRC is split into two 8-bit registers. See also the CIU_CRCResultMSB register.
Note: Setting the bit MSBFirst in CIU_Mode register reverses the bit order, the byte order
is not changed
Table 234. CIU_CRCResultMSB register (address 6311h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol CRCResultMSB[7:0]
Reset 11111111
Access RRRRRRRR
Table 235. Description of CIU_CRCResultMSB bits
Bit Symbol Description
7 to 0 CRCResultMSB[7:0] This register shows the actual value of the most significant byte of
the CRC calculation. It is valid only if CRCReady bit in CIU_Status1
register is set to logic 1.
Table 236. CIU_CRCResultLSB register (address 6312h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol CRCResultLSB[7:0]
Reset 11111111
Access RRRRRRRR
Table 237. Description of CIU_CRCResultLSB bits
Bit Symbol Description
7 to 0 CRCResultLSB[7:0] This register shows the actual value of the most significant byte of
the CRC register. It is valid only if CRCReady bit in CIU_Status1
register is set to logic 1.