Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 169 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
3 LargeBWPLL Set to logic 1, the bandwidth of the internal PLL for clock recovery is
extended.
Note: As the bandwidth is extended, the PLL filtering effect is weaker
and the performance of the communication may be affected.
2 ManualHPCF Set to logic 0, the HPCF[1:0] bits are ignored and the HPCF[1:0]
settings are adapted automatically to the receiving mode.
1 to 0 HPCF[1:0] Selects the High Pass Corner Frequency (HPCF) of the filter in the
internal receiver chain
Value Description
00 For signals with frequency spectrum down to 106 kHz
01 For signals with frequency spectrum down to 212 kHz
10 For signals with frequency spectrum down to 424 kHz
11 For signals with frequency spectrum down to 848 kHz
Table 231. Description of CIU_ManualRCV bits
…continued
Bit Symbol Description