Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 165 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.23.26 CIU_FelNFC1 register (630Ah)
Defines the length of the FeliCa Sync bytes and the minimum length of the received
frame.
Table 224. CIU_FelNFC1 register (address 630Ah) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol FelSyncLen[1:0] DataLenMin[5:0]
Reset 00000000
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 225. Description of CIU_FelNFC1 bits
Bit Symbol Description
7 to 6 FelSyncLen[1:0]] Defines the length of the Sync bytes.
Value Description
00 B2 4D
01 00 B2 4D
10 00 00 B2 4D
11 00 00 00 B2 4D
5 to 0 DataLenMin[5:0] These bits define the minimum length of the accepted frame length.
This parameter is ignored at 106 kbit/s if the DetectSync bit in
CIU_Mode register is set to logic 0. If a received frame is shorter as the
defined DataLenMin value, the frame will be ignored.
DataLenMin 4 DataPacketLenght