Datasheet

PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 126 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.13.3 NFC-WI/S
2
C initiator mode
The PN532 includes 2 counters of 127 and 31, with digital filtering, to enable activation
from the secure IC (ACT_REQ_Si), or the command to go from data to command mode
(ESC_REQ).
8.6.14 Hardware support for FeliCa and NFC polling
8.6.14.1 Polling sequence functionality for initiator
1. Timer: The CIU has a timer, which can be programmed to generate an interrupt at the
end of each timeslot, or if required at the end of the last timeslot only.
2. The receiver can be configured to receive frames continuously. The receiver is ready
to receive immediately after the last frame has been transmitted. This mode is
activated by setting to logic 1 the bit RxMultiple in the register CIU_RxMode. It has to
be set to logic 0 by firmware.
3. The CIU adds one byte at the end of every received frame, before it is transferred into
the FIFO buffer. This byte indicates whether the received frame is correct (see
register Err). The first byte of each frame contains the length byte of the frame.
4. The length of one frame is 18 or 20 bytes (+1 byte error Info). The size of the FIFO is
64 bytes. This means 3 frames can be stored in the FIFO at the same time. If more
than 3 frames are expected, the 80C51 has to read out data from the FIFO, before the
FIFO is filled completely. In the case that the FIFO overflows, data is lost. (See error
flag BufferOvfl).
Table 163. NFC_WI_control register (address 610Eh) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol - - - - nfc_wi_status - nfc_wi_en_
act_req_im
nfc_wi_en_
clk
Reset 0000 0 0 0 0
Access RRRR R R/WR/W R/W
Table 164. Description of NFC_WI_control bits
Bit Symbol Description
7 to 4 - Reserved.
3 nfc_wi_status Indicates a NFC-WI counter has reached its limit. Set to logic 1,
when the counter has reached its limit. It can also be used as an
interrupt for the 80C51 if the IE0_6 bit is set to logic 1 (see
Table 10 on page 17
).
2 - Reserved.
1 nfc_wi_en_act_req_im Selection of the NFC-WI counter. This bit is used to select the
31 or 127 counter.
When set to logic 0, the 31 counter is selected.
When set to logic 1, the 127 counter is selected.
0 nfc_wi_en_clk Enable the NFC-WI counters on SIGIN. When set to logic 1, the
counters can run and count the clock cycles within 2 and
12 MHz.