Datasheet

Table Of Contents
PN532_C1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.6 — 28 November 2017
115436 119 of 222
NXP Semiconductors
PN532/C1
Near Field Communication (NFC) controller
8.6.10 Random generator
The random generator is used to generate various random number needed for the
NFCIP-1 protocol, as well as for MIFARE security.
It can also be used for test purpose, by generating random data through the field.
The Control_switch_rng register can also be used to control the behavior of the SVDD
switch.
Table 159. Data_rng register (address 6105h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol data_rng
Reset XXXXXXXX
Access R/W R/W R/W R/W R/W R/W R/W R/W
Table 160. Description of Data_rng bits
Bit Symbol Description
7 to 0 data_rng Random number data register.
Table 161. Control_switch_rng register (address 6106h) bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol - hide_svdd_
sig
sic_switch_
overload
sic_switch_
en
- cpu_need_
rng
random_
dataready
-
Reset 01000001
Access R R/W R R/W R R/W R/W R
Table 162. Description of Control_switch_rng bits
Bit Symbol Description
7 - Reserved.
6 hide_svdd_sig Configure the internal state of SIGIN and P34 in an idle state. This
bit can be used to avoid spikes on SIGIN and P34 when the SVDD
switch becomes enabled or disabled.
When set to logic 0, the internal state of SIGIN and P34 signals are
driven by respectively the pads SIGIN and P34.
When set to logic 1, the internal state of SIGIN is fixed to 0 and the
internal state of P34 is fixed set to logic 1.
5 sic_switch_overload State of the current limitation of the SVDD switch. When set to
logic 0, it indicates that the current consumption into the SVDD switch
does no exceed the limit.
When set to logic 1, the current limitation of the SVDD switch is
activated by the switch.
4 sic_switch_en Enable of the SVDD switch. When set to logic 0, the SVDD switch is
disabled and the SVDD output power is tied to the ground.
When set to logic 1, the SVDD switch is enabled and the SVDD output
deliver power to the secure IC and to the internal pads (SIGIN,
SIGOUT and P34).
3 - Reserved