Datasheet
Table Of Contents
- Table of Contents
- List of Figures
- List of Tables
- 1. Introduction
- 2. Pin Connections
- 3. Specifications
- 4. RF Front End Interface
- 5. Power Distribution
- 6. Clocking
- 7. Detection Engine - Modems
- 8. Digital Interface and Control
- 9. Application Programming Interface
- 10. Application Information
- 11. Packaging Information
- Glossary
SX1302
Datasheet Rev 1.0
DS.SX1302.W.APP June 2019
24 of 31
www.semtech.com
10. Application Information
The Core cell reference design represents a compact reference implementation of the SX1302, along with its power
management, clocks, Front End Module, RF matching and filtering.
10.1 Geographical Designs
The suitability of the SX1302-based reference designs to national radio frequency regulations depends on the RF front-end
device being used. With the SX1250/55/57 front-ends provided by Semtech, the expectation is:
• Up to +27 dBm supported in the USA, Canada or other FCC-type countries
• Up the +27 dBm in Europe and other ITU 1 regions
• Up to +21 dBm in Japan where the phase noise requirement is more stringent
10.2 Reference Block Diagram
The application block diagram is shown below:
Figure 10-1: Application Design Block Diagram
SX1302 HOST
SX1250
SX1250
PA / LNA
PA / LNA
TCXO
Enable, LNA active, PA active, PA gain
Enable, LNA active, PA active, PA gain
Reset
SPI
Clk_32_MHz
I/Q
Reset
SPI
Clk_32_MHz
I/Q
Reset
SPI
Optional GPS
PPS