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Revision History Version ECO Date Rev 1.0 ECO-047283 June 2019 SX1302 Datasheet DS.SX1302.W.APP Modifications First Release www.semtech.com Rev 1.
Table of Contents General Description.............................................................................................................................................1 Key Features...........................................................................................................................................................1 Ordering Information .........................................................................................................................................
11.5 Tape and Reel Specification ...................................................................................................... 28 11.6 Thermal Impedance ..................................................................................................................... 28 Glossary ................................................................................................................................................................ 29 SX1302 Datasheet DS.SX1302.W.APP www.semtech.
List of Figures Figure 2-1: Pin Locations, Top View........................................................................................................... Figure 4-1: Receive Interconnection ......................................................................................................... Figure 4-2: Transmit Interconnection ....................................................................................................... Figure 8-1: SPI Timing Diagram........................................
List of Tables Table 2-1: Pinout.................................................................................................................................................. 8 Table 3-1: ESD and Latch-Up Notice.......................................................................................................... 12 Table 3-2: Minimum and Maximum Ratings .......................................................................................... 13 Table 3-3: Operating Range............................
1. Introduction The SX1302 is a digital baseband engine, capable of detecting and demodulating large amounts of LoRa® packets expected in the IOT networks. 1.1 RF Front End Interface The SX1302 is intended to be used with various RF Front End chips (RF to IQ), such as Semtech’s SX1255/57. Details on the interface and compatibility is available on Section 4. "RF Front End Interface" on page 16 . 1.2 Power Distribution The SX1302 is supplied on two different domains, 1.
2. Pin Connections 2.
Table 2-1: Pinout Pin Number Pin Name Direction Description 24 GND Power Ground 25 GND Power Ground 26 RADIO_CTRL[7] Output Radio B Enable LNA and control switch 27 RADIO_CTRL[8] Output Radio B Enable PA and control switch 28 RADIO_CTRL[9] Output Radio B Reset 29 RADIO_CTRL[10] Output Radio B PA gain_0 30 VCC_IO Power IO supply 31 RADIO_CTRL[11] Output Radio B PA gain_1 32 RADIO_B_IQ[3] 33 SX1250 SX1255/57 NRESET RESET I/O - NS DIO4 I_OUT RADIO_B_MISO Input MI
Table 2-1: Pinout Pin Number Pin Name Direction Description 52 GPIO[9] In/out General purpose IO 53 GPIO[8] In/out General purpose IO 54 GPIO[7] In/out General purpose IO 55 GND Power Ground 56 VCC_CORE Power Core supply 57 GPIO[6] In/out General purpose IO 58 GPIO[5] In/out General purpose IO 59 GPIO[4] In/out General purpose IO 60 GPIO[3] In/out General purpose IO 61 VCC_IO Power IO supply 62 GND Power Ground 63 GPIO[2] In/out General purpose IO 64 GPIO
2.2 Package View ϯϱ ϭ ϱϮ ϭϴ Figure 2-1: Pin Locations, Top View SX1302 Datasheet DS.SX1302.W.APP www.semtech.com Rev 1.
3. Specifications All measured performances and conditions are listed in this chapter. Quantitative indications left in other chapters are for the ease of reading and are indicative only. The following specifications are given for the typical operating conditions of VCC_IO = VBAT = 3.3 V, temperature = 25 °C (85°C for maximum values), reference oscillator frequency = 32 MHz, RF centre frequency = 868 MHz. All RF impedances are matched using the reference design, see Section 10.
3.2 Absolute Minimum and Maximum Ratings Table 3-2: Minimum and Maximum Ratings Symbol Description Min Max Unit VCCIO,ABSMAX IO power supply to VSS -0.5 4.0 V VCCcore,ABSMAX Core power supply to VSS -0.5 1.5 V TSTORE Storage temperature -40 +125 °C TREFLOW Peak reflow temperature 260 °C MSL Humidity rating MSL1 3.3 Operating Range Table 3-3: Operating Range Symbol Description Minimum Typical Maximum Unit VCCIO,OP IO supply operating conditions 3.0 3.3 3.
Table 3-4: Performances Symbol Description Min Typ Max IDD_TX_COR E Sending data on SX1250 using SF6, average, on VCC_CORE - 7.2 - mA IDD_TX_IO Sending data on SX1250 using SF6, average, on VCC_IO - 1.4 - mA IDD_OFF_CO RE OFF current, clock is disabled, on VCC_CORE - 3.2 - mA IDD_OFF_IO On VCC_IO - 10 - uA FERR Frequency Offset Tolerance, less than 3dB degradation2 - - Unit +/-0.25* Hz BW 1. Average and Peak current concepts are explained in Section 5. on page 18 2.
Table 3-6: Reference Design Performance Symbol Description Min Typ Max Unit S_SF9_125 SF9 Sensitivity, LoRa 125 kHz bandwidth - -132.5 - dBm S_SF10_125 SF10 Sensitivity, LoRa 125 kHz bandwidth - -135.5 - dBm S_SF11_125 SF11 Sensitivity, LoRa 125 kHz bandwidth - -138 - dBm S_SF12_125 SF12 Sensitivity, LoRa 125 kHz bandwidth - -141 - dBm S_FSK_50 50 kbps, GFSK modulation - -111 - dBm S_SF9_250 SF9 Sensitivity, LoRa 250 kHz bandwidth - -126.
4. RF Front End Interface The SX1302 can accommodate any of the following RF front-end devices: SX1250, SX1255 and SX1257, all of which are Semtech products. For any other device, hardware logic could be used on the interface for translation purposes. The roles of these devices is to down-convert the RF signal to baseband (direct conversion or low-IF), and digitize it to feed the IQ samples to the SX1302 baseband chip. The interconnection to the front-end device is organized as follows.
The table hereafter summarizes the characteristics of the three front-end devices currently supported with the SX1302: Table 4-1: Semtech RF Front-end Summary Part # Frequency Band Receive BW Output Power Rx NF Comment SX1255 400 - 510 MHz 1 MHz About 0 dBm 5 dB 5x5 mm package, 20 mA Rx SX1257 862 - 1020 MHz 1 MHz About 0 dBm 5 dB 5x5 mm package, 20 mA Rx SX1250 150 - 960 MHz 1 MHz +22 dBm 10 dB 4x4 mm package, 5 mA Rx SX1302 Datasheet DS.SX1302.W.APP www.semtech.com Rev 1.
5. Power Distribution The SX1302 needs two powers rails: VCC_IO and VCC_CORE. VCC_IO sets the voltage level for all of the digital interfaces of the chip (SPI, GPIO and IQ interface), whilst VCC_CORE supplies current to the baseband engine. VCC_CORE can be derived from a higher voltage source with a high-efficiency DC-DC buck converter, as it is only 1.2 V. An optimized power management strategy is proposed in Semtech’s reference designs, and one example of displayed in Section 10.
6. Clocking The SX1302 uses the 32 MHz clock source from its companion RF Front-end (for example, Semtech’s SX1250) to clock the entire system. This clock is injected on pin 43 (RADIO_A_CLK_I). It is advised to use a GPS-precision TCXO (0.5 ppm), in order to have a maximum “capture range” for the receiver, allowing lower precision reference clock, which are cheaper, on the end-devices. SX1302 Datasheet DS.SX1302.W.APP www.semtech.com Rev 1.
7. Detection Engine - Modems The SX1302 embeds 16 different modems, of two sorts: • 8 multi-SF LoRa® modems, capable of demodulating any LoRa® packet from SF5 to SF12 • 8 multi-SF LoRa® modems, specifically demodulating SF5 to SF10 traffic • 1 high-speed multi-BW LoRa® modem (125, 250 or 500 kHz), handling a single declared SF A holistic detection engine can capture any LoRa® traffic in the pre-defined frequency plan, and assign the detected packets to the pool of available modems for demodulation.
8. Digital Interface and Control The transceiver is controlled via a serial interface (SPI) and a set of general purpose input/output (DIOs). 8.1 Host SPI Interface The SPI interface gives access to the configuration register via a synchronous full-duplex frame corresponding to CPOL = 0 and CPHA = 0 in Motorola/Freescale nomenclature. An address byte followed by a data byte is sent for a write access whereas an address byte is sent and a read byte is received for the read access.
8.1.2 SPI Timings All timings are given in next table for Max load cap of 10 pF. Table 8-1: SPI Timing Requirements Symbol Description Minimum Typical Maximum Unit Timing constraints in SPI inputs tSPI,SCK SCK period 100 ns tSPI,SCKH SCK high duration 40 ns tSPI,SCKL SCK low duration 40 ns tSPI,SCKR SCK rise time (10% VCC_IO ->90% VCC_IO) 0 2.5 ns tSPI,SCKF SCK fall time (90% VCC_IO ->10% VCC_IO) 0 2.
9. Application Programming Interface Through SPI interface, the SX1302 is fully controlled by its host, whether it is a MCU (smal-size cell) or a Linux MPU for higher-end gateways.
10. Application Information The Core cell reference design represents a compact reference implementation of the SX1302, along with its power management, clocks, Front End Module, RF matching and filtering. 10.1 Geographical Designs The suitability of the SX1302-based reference designs to national radio frequency regulations depends on the RF front-end device being used.
10.3 Reference Design Layout Figure 10-2: Reference Design PCB Layout SX1302 Datasheet DS.SX1302.W.APP www.semtech.com Rev 1.
11. Packaging Information 11.1 Package Outline Drawing The transceiver is delivered in a 7x7mm QFN package with 0.35mm pitch: Figure 11-1: QFN 7x7 Package Outline Drawing SX1302 Datasheet DS.SX1302.W.APP www.semtech.com Rev 1.
11.2 Package Marking Figure 11-2: SX1302 Package Marking 11.3 Land Pattern The recommended land pattern is as follows: Figure 11-3: QFN 7x7mm Land Pattern SX1302 Datasheet DS.SX1302.W.APP www.semtech.com Rev 1.
11.4 Reflow Profiles Reflow process instructions are available from the Semtech website, at the following address: http://www.semtech.com/quality/ir_reflow_profiles.html The transceiver uses a QFN68 7x7mm package, also named MLP package. 11.5 Tape and Reel Specification Pin #1 Figure 11-4: Tape and Reel Specification Table 11-1: Tape and Reel Specification Carrier Tape (mm) Package Size Tape Width1 (W) Pocket2 Pitch (P) AO3 16 12 7.3 7x7 Reel BO KO4 Reel Size [in] Reel Width [mm] Min.
Glossary List of Acronyms and their Meaning Acronym Meaning ACR Adjacent Channel Rejection ADC Analog-to-Digital Converter AFC Automatic Frequency Correction AGC Automatic Gain Control API Application Programming Interface β Modulation Index BR Bit Rate BT Bandwidth-Time bit period product BW BandWidth CAD Channel Activity Detection CMD Command Transaction CPOL Clock Polarity CPHA Clock Phase CR Coding Rate CRC Cyclical Redundancy Check CSN Chip Select active low CW Contin
List of Acronyms and their Meaning Acronym Meaning LO Local Oscillator Long Range Communication LoRa® the LoRa® Mark is a registered trademark of the Semtech Corporation LSB Least Significant Bit MD More Data MIC Message Integrity Check MISO Master Input Slave Output MOSI Master Output Slave Input MSB Most Significant Bit MSK Minimum-Shift Keying NESN Next Expected Sequence Number NOP No Operation NRZ Non-Return-to-Zero OOK On-Off Keying PA Power Amplifier PDU Protocol Data Un
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