Specifications

26
AT83SND2CMP3
7524D–MP3–07/07
DAC Register Tables Table 20. DAC Register Address
DAC Gain The DAC implements severals gain control: line-in (Table 21.), master playback (), line-
out (Table 24.).
Address Register Name Access Reset state
00h DAC_CTRL Dac Control Read/Write 00h
01h DAC_LLIG Dac Left Line in Gain Read/Write 05h
02h DAC_RLIG Dac Right Line in Gain Read/Write 05h
03h DAC_LPMG Dac Left Master Playback Gain Read/Write 08h
04h DAC_RPMG Dac Right Master Playback Gain Read/Write 08h
05h DAC_LLOG Dac Left Line Out Gain Read/Write 00h
06h DAC_RLOG Dac Right Line Out Gain Read/Write 00h
07h DAC_OLC Dac Output Level Control Read/Write 22h
08h DAC_MC Dac Mixer Control Read/Write 09h
09h DAC_CSFC
Dac Clock and Sampling Frequency
Control
Read/Write 00h
0Ah DAC_MISC Dac Miscellaneous Read/Write 00h
0Ch DAC_PRECH Dac Precharge Control Read/Write 00h
0Dh DAC_AUXG Dac Auxilary input gain Control Read/Write 05h
10h DAC_RST Dac Reset Read/Write 00h
11h PA_CRTL Power Amplifier Control Read/Write 00h
Table 21. Line-in gain
LLIG 4:0
RLIG 4:0 Gain (dB)
00000 20
00001 12
00010 9
00011 6
00100 3
00101 0
00110 -3
00111 -6
01000 -9
01001 -12
01010 -15
01011 -18
01100 -21