Specifications

AT83SND2CMP3

7524D–MP3–07/07

Figure 24. Serial Audio Interface

Protocol is as following to access DAC registers:

Figure 25. Dac SPI Interface

DAC Interface SPI Protocol On AUDCDIN, the first bit is a read/write bit. 0 indicates a write operation while 1 is for a

read operation. The 7 following bits are used for the register address and the 8 last ones

are the write data. For both address and data, the most significant bit is the first one.

In case of a read operation, AUDCDOUT provides the contents of the read register,

MSB first.

The transfer is enabled by the AUDCCS signal active low. The interface is resetted at

every rising edge of AUDCCS in order to come back to an idle state, even if the transfer

does not succeed. The DAC Interface SPI is synchronized with the serial clock AUDC-

Audio

DAC

AUDCDIN

AUDCCLK

AUDCCS

Serial Audio Interface

AUDCDOUT

AUDCDIN

AUDCCLK

AUDCCS