User`s guide

Known Pattern with Bit Clock and Marker Theory
This section will give a basic overview of the methodology behind the Known Pattern with Bit Clock and
Marker measurement tool. In addition to the data signal to be analyzed, this tool requires a pattern
connected to an Arm channel along with a bit clock supplied to another channel. If your system has a
PM-50 card installed, you can connect the data signal directly to channel 1. The Bit clock can either be
generated internal to the SIA-3000 (if you have the Clock to Data Recovery module installed on your
system) or from an external source. The marker signal has an edge relative to the same bit of the
pattern each time the marker occurs. Since a bit clock is also used, the ideal UI width is measured not
calculated.
The following steps are performed automatically when a measurement is acquired using this tool.
• The Unit Interval is measured directly off of the bit clock through multiple period measurements. For
an in-depth description, read Histogram Theory.
• Next, the total DCD+ISI is calculated. Histograms are made of every edge in the pattern. The mean
values of these histograms are compared to the ideal edge locations. The measured mean location is
subtracted from the actual edge location defined by the bit clock. The worst-case positive edge
location is added to the worst-case negative location giving the total DCD+ISI. It can also be
thought of comparing the earliest edge to the latest edge.
EXPECTED
IDEAL
PATTERN
MEASURED
PATTERN
PATTERN
MARKER
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