Specifications

Integra M2106+
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WA_DEV_M2106+_PTS_003-001 April, 2007
The Reset process is activated either by the external ~RST signal or by an internal signal (coming
from a reset generator). This automatic reset mode is activated at Power-up.
The Wireless CPU
®
remains in Reset mode as long as the Reset signal is held low.
• This signal should be used only for “emergency” resets:
A software reset is always preferred to a hardware reset.
3.5.2 Reset Sequence
To activate the « emergency » reset sequence, the ~RST signal must be set to low for 500 μs minimum.
As soon as the reset is completed, the AT interface answers « OK » to the application. For this, the
application must send AT↵ to get the “OK” response.
If the application manages hardware flow control, the AT commands can be sent during the initialization
phase. Another solution is to use the AT+WIND command to obtain an unsolicited status from the Wireless
CPU
®
.
For further details, refer to the AT commands Interface Guide documentation
[7].
RESET m od e
I
BB+RF
=20
to 40 m A
EXT ERN A L RESET
ST A TE O F T H E
W ireless CPU
®
W ireless CPU
®
REA DY
M in:500 μs
Typ: 2 ms
A
T answ ers “ OK”
W ireless CPU
®
REA DY
SIM and netw ork dependent
Wireless CPU
®
ON
I
BB+RF
<120 m A
w ithout loc update
Figure 10: Reset sequence diagram