Specifications
Integra M2106+
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This document is the sole and exclusive property of Wavecom. Not to be distributed or divulged without prior written
agreement.
WA_DEV_M2106+_PTS_003-001 April, 2007
3.3.2 Operating Sequences
3.3.2.1 Power-ON
Once the Wireless CPU
®
is supplied the ON/~OFF signal must be asserted high during a delay of T
on-hold
(Hold delay on the ON/~OFF signal) to power-ON.
After this delay, once the firmware has completed its power-up sequence, an internal logic maintains the
Wireless CPU
®
in power ON condition.
You must not de-assert this ON/~OFF signal before this internal logic is internally asserted by the firmware;
the Wireless CPU
®
would not start-up otherwise
POW ER SUPPLY
ON/
~OFF
STA T E OF TH E
Wireless CPU
®
Wireless CPU
®
OFF
A
T answ ers « OK »
Wireless CPU
®
REA DY
T
on-h old
SIM and Netw ork dependent
RESET m ode
INTERNA L RST
T
rst
(4 2 m s t yp )
Wireless CPU
®
ON
(no loc. update)
Figure 6: Power-ON sequence diagram (no PIN code activated)
The duration of the firmware power-up sequence depends on several factors:
• firmware version used by the Wireless CPU
®
,
• need to perform a recovery sequence if the power has been lost during a flash memory modification.
Other factors have a minor influence
• number of parameters stored in EEPROM by the AT commands received so far
• ageing of the hardware components, especially the flash memory
• temperature conditions
The recommended way to de-assert the ON/~OFF signal is to use either an AT command or WIND
indicators: the application must detect the end of the power-up initialization and de-assert ON/~OFF
afterwards.
• Send an “AT” command and wait for the “OK” answer: once the initialization is complete the AT
interface answers « OK » to “AT” message
1
.
• Wait for the “+WIND: 3” message: after initialization, the Wireless CPU
®
, if configured to do so, will
return an unsolicited “+WIND: 3” message. The generation of this message is enabled or disabled via
1
If the application manages hardware flow control, an AT command can be sent during the initialisation phase.