Technical data

2.6.4 DISPOSAL OF OLD ELECTRONIC EQUIPMENT .................................................... 24
2.7 PRODUCT MARKING................................................................................................ 24
3 Mechanical Description ......................................................................... 26
3.1 INTERFACE DESCRIPTION ........................................................................................ 26
3.2 ANTENNA PAD........................................................................................................ 27
3.3 PHYSICAL DIMENSIONS ........................................................................................... 28
4 System Connector Interface................................................................... 30
4.1 OVERVIEW .............................................................................................................. 30
4.2 DEALING WITH UNUSED PINS................................................................................... 33
4.3 GENERAL ELECTRICAL AND LOGICAL CHARACTERISTICS.......................................... 35
4.3.1 LEVEL TRANSLATOR INTERFACES..................................................................... 36
4.3.1.1 Common Level Translator Interface ......................................................... 36
4.3.1.2 I2C Level Translator Interface .................................................................. 37
4.4 GROUNDS............................................................................................................... 37
4.4.1 ANALOGUE GROUND (AREF) ............................................................................ 38
4.4.2 COMMON GROUND (GND) ............................................................................... 38
4.5 REGULATED POWER SUPPLY INPUT (VCC)................................................................. 39
4.6 VOLTAGE REFERENCE (VREF) ................................................................................... 41
4.6.1 VREF AS AN OUTPUT FROM THE WIRELESS CPU® .............................................. 42
4.6.2 VREF AS AN INPUT TO THE WIRELESS CPU® ...................................................... 43
4.7 BATTERY CHARGING INPUT (CHG_IN) ...................................................................... 43
4.7.1 CHARGING PROCESS........................................................................................ 45
4.7.2 SERIES DIODE .................................................................................................. 46
4.7.3 BATTERY SELECTION ....................................................................................... 46
4.8 POWERING THE WIRELESS CPU® ON AND OFF (ON/OFF) ........................................... 49
4.8.1 TURNING THE WIRELESS CPU® ON.................................................................... 49
4.8.2 TURNING THE WIRELESS CPU® OFF................................................................... 51
4.9 ANALOGUE AUDIO .................................................................................................. 53
4.9.1 AUXILIARY AUDIO TO WIRELESS CPU® (AUXI).................................................... 54
4.9.2 AUXILIARY AUDIO FROM WIRELESS CPU® (AUXO).............................................. 55
4.9.3 MICROPHONE SIGNALS (MICIP, MICIN).............................................................. 56
GR64 Integrators’ Manual
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This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without prior written agreement.
Ce document est la propriété exclusive de WAVECOM. Il ne peut être communiqué ou divulgué à des tiers sans son autorisation préalable