Specifications

Product Technical Specification & Customer Design Guidelines
Interfaces
© Confidential
Page: 75 / 116
This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without
prior written agreement.
WA_DEV_Q64_PTS_001-003 January 9, 2009
Figure 29: ON/OFF circuitry inside Q64
3.14.3
Application
Figure 30: Example of ON/OFF pin connection
3.14.3.1
Power-ON
Whatever the Q64 has embedded GR plug-in or not, once the Wireless CPU
®
is
powered, the application must set the ON/OFF signal to low to start the Wireless
CPU
®
power-ON sequence. The ON/OFF signal must be held low during a minimum
delay of T
on/off-hold
(Minimum hold delay on the ON/OFF signal) to power-ON. After this
delay, an internal mechanism maintains the Q64 in power-ON condition.
During the power-ON sequence, an internal reset is automatically performed by the
Wireless CPU
®
for 40ms (typically). During this phase, any external reset should be
avoided.