User guide

CM52 Integrators’ Manual
CM52 Integrators’ Manual
WI_DEV_CM52_UGD_001-001
Page 21 of 53
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2.3.3 Logic Levels
Many of the signals present in the interface are CMOS signals where the following levels apply.
The nominal voltage level for the CMOS signals is 2.9 V. Drive capability of the outputs is also
indicated.
Limits Parameter Test
Conditions
Min Max
Units
High level output voltage (I
OH
= 800 µA) V
OH
2.45 3.1 Volts
Low level output voltage (I
OL
= 800 µA) V
OL
0 0.45 Volts
High level input voltage V
IH
1.9 3.1 Volts
Low level input voltage V
IL
0 0.9 Volts
Table 4: CMOS Output / Input Electrical Characteristics
Note: The maximum voltage that may be applied to any CMOS signal is 3.1V
2.3.3.1 Leakage Current for CMOS Signals
The following table defines the maximum leakage for the CMOS inputs of the CM52.
Parameter Max Units
High level drive for input signal with internal pull down 60 uA
Low level drive for input signal with internal pull up
3
60 uA
Table 5: Maximum Leakage Current for CMOS signals
2.3.3.2 Validity of CMOS signals
The CMOS signals of the CM52 shall only be considered valid when the level of the VREF signal is
above 2.3V.
2.4 Power Supply
The CM52 requires a dual DC power supply implementation in the application. VCC_MAIN provides
power to the entire radio while VCC_AUX provides power for the 3-Watt functionality and biasing
for the RF switches.
Note: VCC_AUX must be present if the 3W option is provided even if it is not used. If the 3W
circuitry is not populated then VCC_AUX is not required or may be bussed together with
VCC_MAIN.
3
DTR is 90 uA and HW_SD is 350 uA