Specifications

Wireless CPU
®
Q24 Series
Interfaces
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This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without
prior written agreement.
WM_PRJ_Q24NG_PTS_001-004
January 16, 2007
3. When using a battery as power source, it is not recommended to let this
signal high:
If the battery voltage is too low and the ON/~OFF signal at low level, an
internal mechanism switches OFF the Wireless CPU
®
. This automatic process
prevents the battery to be over discharged and optimize its life span.
4. During the power-ON sequence, an internal reset is automatically performed
by the Wireless CPU
®
for 42 ms (typical). Any external reset should be
avoided during this phase.
5. Connecting a charger on the Wireless CPU
®
as exactly the same effect than
setting the ON/~OFF signal. In particular the Wireless CPU
®
will not POWER-
OFF after the AT+CPOF command, unless the Charger is disconnected.
3.15.2.2 Power-OFF
To properly power-OFF the Wireless CPU
®
, the application must reset the ON/~OFF
signal to low and then send the AT+CPOF command to de-register from the network
and switch off the Wireless CPU
®
.
Once the « OK » response is issued, the Wireless CPU
®
is set to OFF mode. The
external power supply can be switched off.
Figure 11: Power-OFF sequence diagram
Caution:
It is not allowed to power-OFF the Wireless CPU
®
by disconnecting the supply pins
VBATT and VDD.
Notes:
• If the ON/~OFF pin is maintained to ON (High Level), then the Wireless CPU
®
can’t be switched OFF
• Instead of sending AT+CPOF, use the Wireless CPU
®
external interrupt pin (see
the External interrupt)
• If the AT command AT+CFUN=1 is sent to the application, the Wireless CPU
®
re-starts whatever the level (high or low) of the ON/~OFF signal
VDD
ON/~OFF
Status:
Ready
OFF mode
Network dependent
AT+CPOF
“OK” answer