Specifications

Wireless CPU
®
Q24 Series
Interfaces
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WM_PRJ_Q24NG_PTS_001-004
January 16, 2007
Pin description
Signal
Pin
number
I/O I/O type Reset state Description
ROW0 13 I/O CMOS / CMOS 1X Pull-down to 0V Row scan
ROW1 15 I/O CMOS / CMOS 1X Pull-down to 0V Row scan
ROW2 17 I/O CMOS / CMOS 1X Pull-down to 0V Row scan
ROW3 19 I/O CMOS / CMOS 1X Pull-down to 0V Row scan
ROW4 21 I/O CMOS / CMOS 1X Pull-down to 0V Row scan
COL0 23 I/O CMOS / CMOS 1X Pull-up to 2V8 Column scan
COL1 25 I/O CMOS / CMOS 1X Pull-up to 2V8 Column scan
COL2 27 I/O CMOS / CMOS 1X Pull-up to 2V8 Column scan
COL3 29 I/O CMOS / CMOS 1X Pull-up to 2V8 Column scan
COL4 31 I/O CMOS / CMOS 1X Pull-up to 2V8 Column scan
3.6 Main Serial Link (UART1)
A flexible 6-wire serial interface is available, complying with V24 protocol signaling,
but not with V28 (electrical interface) due to a 2.8 volt interface.
The signals are:
• TX data (CT103/TX)
• RX data (CT104/RX)
• Request To Send (CT105/RTS)
• Clear To Send (CT106/CTS)
• Data Terminal Ready (CT108-2/DTR)
• Data Set Ready (CT107/DSR)
The two additional signals are:
• Data Carrier Detect (CT109/DCD).
• Ring Indicator (CT125/RI).
Figure 4: UART1 Serial Link signals