Specifications

Wireless CPU
®
Q24 Series
Interfaces
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prior written agreement.
WM_PGM_Q24NG_PTS_001-005 November 20, 2007
3. ce, it is not recommended to let this
ig l
If the battery voltage is too low and
internal mechanism switches OFF the Wireless CPU
®
. This automatic process
4. ence, an internal reset is automatically performed
ase.
5. Connecting a charger on the Wireless CPU
®
as exactly the same effect than
setting the ON/~OFF signal. In particular the Wireless CPU
®
will not POWER-
OFF after the AT+CPOF c e Charger is disconnected.
.15.2.2 Power-OFF
o properly
st reset the ON/~OFF
ignal to low and then send the AT+CPOF command to de-register from the network
®
.
OK » response is issued, the Wireless CPU
®
is set to OFF mode. The
xternal power supply can wi ed off.
Figure 11: Power-OFF sequence diagram
When using a battery as power sour
s na high:
the ON/~OFF signal at low level, an
prevents the battery to be over discharged and optimize its life span.
During the power-ON sequ
by the Wireless CPU
®
for 42 ms (typical). Any external reset should be
avoided during this ph
ommand, unless th
3
T power-OFF the Wireless CPU
®
, the application mu
s
and switch off the Wireless CPU
Once the «
e be s tch
VDD
ON/~OFF
Status:
Ready
OFF mode
Network dependent
A
T+CPOF
“OK” answer
Caution:
It is not allowed to power-OFF the Wireless CPU
®
by disconnecting the supply pins
VBATT and V
Notes:
DD.
• If the ON/~OFF pin i tained ON (High Level), then the Wireless CPU
®
can’t be switched OF
• Instead of sending AT+CPOF, use the Wireless CPU
®
external interrupt pin (see
the External interrupt
• If the AT command AT+CFUN=1 is sent to the application, the Wireless CPU
®
s main
F.
to
)
re-starts whatever the level (high or low) of the ON/~OFF signal