Specifications

Wireless CPU

Q24 Series

Interfaces

3 Interfaces

Note:

Some of the Wireless CPU

Q24 Series interface signals are multiplexed in order to

limit the total number of pins. But this architecture imposes some restrictions.

Example:

If the SPI bus and 2-wire bus are multiplexed and if the SPI bus is used, then the 2-

wire bus is not available.

Caution:

To power-ON the Wireless CPU

Q24 Series correctly and to avoid any damage, all

external signals must be inactive when the Wireless CPU

Q24 Series is OFF.

ng either an LCD module, or a

The GPC is made by the KYOCERA / AVX group with the following reference:

The mat ollowing reference:

For further details, refer to section 6.1 General Purpose Connector Data Sheet.

3.1 General Purpose Connector (GPC)

A 60-pin connector, with 0.5 mm pitch, is provided to interface the Wireless CPU

Q24 Series with a customer application board containi

keyboard, a SIM connector, a battery connection, etc.

• 14 5087 060 930 861.

ting connector has the f

• 24 5087 060 X00 861.

This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without

prior written agreement.

WM_PGM_Q24NG_PTS_001-005

November 20, 2007