Product data

UJA1167 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 18 April 2014 56 of 60
NXP Semiconductors
UJA1167
Mini high-speed CAN system basis chip with Standby/Sleep modes &
watchdog
17. Revision history
Table 50. Revision history
Document ID Release date Data sheet status Change notice Supersedes
UJA1167 v.2 20140418 Product data sheet - UJA1167 v.1
Modifications:
Section 1: text revised (2nd paragraph added)
Section 2.1: feature added (loop delay symmetry)
Table 2: table note amended
Section 6.1.1.4: last paragraph added
Section 6.1.1.6: text revised (3rd paragraph)
Section 6.1.1.7: text revised (4th paragraph)
Table 3: row CAN revised
Section 6.2.2: text revised
Section 6.3.1: text revised
Section 6.3.2: text revised
Section 6.7: text and state diagram revised
Table 14: description for bits CMC revised
Table 15: description for bit CTS revised
Section 6.10.3: note added at beginning of section
Section 6.15.1: text revised (4rd last paragraph); last paragraph added
Table 47: symbols and parameters revised for pins V1 and VEXT; parameters t
to(SPI)
and t
bit(RXD)
added; additional measurement for parameter t
d(TXD-RXD)
; parameter t
fltr(rst)
renamed to t
w(rst)
and
value changed; parameter values changed: t
wake
for pin WAKE
Figure 11: added
Section 11.2: added
Section 12.1: text updated
UJA1167 v.1 20130805 Product data sheet - -