Product data

UJA1167 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 18 April 2014 39 of 60
NXP Semiconductors
UJA1167
Mini high-speed CAN system basis chip with Standby/Sleep modes &
watchdog
[1] UJA1167TK/VX only.
[2] 001 if SDMC = 1; otherwise 010.
WDF 0 no change no change no change no change no change
WDS 0 actual state actual state actual state actual state actual state
WMC
[2]
no change no change no change no change
[2]
WPE 0 no change no change no change no change no change
WPF 0 no change no change no change no change no change
WPR 0 no change no change no change no change no change
WPFE 0 no change no change no change no change no change
WPRE 0 no change no change no change no change no change
WPVS 0 no change no change no change no change no change
WRCNTS actual state actual state actual state actual state actual state actual state
Table 43. Register bit settings in UJA1167 operating modes
…continued
Symbol Off (power-on
default)
Standby Normal Sleep Overtemp Reset