Product data

UJA1167 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 18 April 2014 32 of 60
NXP Semiconductors
UJA1167
Mini high-speed CAN system basis chip with Standby/Sleep modes &
watchdog
6.11.2 Restoring factory preset values
Factory preset values are restored if the following conditions apply for at least t
d(MTPNV)
during power-up:
• pin RSTN is held LOW
• CANH is pulled up to V
BAT
• CANL is pulled down to GND
After the factory preset values have been restored, the SBC performs a system reset and
enters Forced normal Mode. Since the CAN bus is clamped dominant, pin RXDC is forced
LOW. During the factory preset restore process, this pin is forced HIGH; a falling edge on
this pin caused by bit PO being set after power-on then clearly indicates that the process
has been completed.
Note that the write counter, WRCNTS, in the MTPNV status register is incremented every
time the factory presets are restored.
6.12 Device ID
A byte is reserved at address 0x7E for a UJA1167 identification code.
6.13 Lock control register
Sections of the register address area can be write-protected to protect against unintended
modifications. Note that this facility only protects locked bits from being modified via the
SPI and will not prevent the UJA1167 updating status registers etc.
Table 32. Identification register (address 7Eh)
Bit Symbol Access Value Description
7:0 IDS[7:0] R D8h device identification code - UJA1167TK
C8h device identification code -UJA1167TK/VX
Table 33. Lock control register (address 0Ah)
Bit Symbol Access Value Description
7 reserved R - cleared for future use
6 LK6C R/W lock control 6: address area 0x68 to 0x6F
0 SPI write-access enabled
1 SPI write-access disabled
5 LK5C R/W lock control 5: address area 0x50 to 0x5F
0 SPI write-access enabled
1 SPI write-access disabled
4 LK4C R/W lock control 4: address area 0x40 to 0x4F - WAKE pin control
0 SPI write-access enabled
1 SPI write-access disabled
3 LK3C R/W lock control 3: address area 0x30 to 0x3F
0 SPI write-access enabled
1 SPI write-access disabled