Product data

UJA1167 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 18 April 2014 31 of 60
NXP Semiconductors
UJA1167
Mini high-speed CAN system basis chip with Standby/Sleep modes &
watchdog
6.11.1.1 Calculating the CRC value for MTP programming
The cyclic redundancy check value stored in bits CRCC in the MTPNV CRC control
register is calculated using the data written to registers 0x73 and 0x74.
The CRC value is calculated using the data representation shown in Figure 7 and the
modulo-2 division with the generator polynomial: X
8
+X
5
+ X
3
+X
2
+ X + 1. The result of
this operation must be bitwise inverted.
The following parameters can be used to calculate the CRC value (e.g. via the Autosar
method):
Alternatively, the following algorithm can be used:
data = 0 // unsigned byte
crc = 0xFF
for i = 0 to 1
data = content_of_address(0x73 + i) EXOR crc
for j = 0 to 7
if data  128
data = data * 2 // shift left by 1
data = data EXOR 0x2F
else
data = data * 2 // shift left by 1
next j
crc = data
next i
crc = crc EXOR 0xFF
Table 30. MTPNV CRC control register (address 75h)
Bit Symbol Access Value Description
7:0 CRCC R/W - CRC control data
Fig 7. Data representation for CRC calculation
Table 31. Parameters for CRC coding
Parameter Value
CRC result width 8 bits
Polynomial 0x2F
Initial value 0xFF
Input data reflected no
Result data reflected no
XOR value 0xFF
7 601
register 0x73
7 601
register 0x74
015aaa382