Specifications

82 Chapter 4: Matrox Solios hardware reference
With interlaced video sources, you can typically establish which field is being input
by noting the phase shift between the horizontal and the vertical synchronization
signals. Alternatively, you can define an auxiliary signal as a field polarity input
signal and transmit the field polarity on this signal.
To establish which pixels are active in a line (because the horizontal
synchronization signal does not identify the blanking portion of the signal), the
board can generate a data valid signal based on information specified in the DCF.
Alternatively, you can define an auxiliary input signal as a data valid signal.
Clock
Each PSG can accept or provide one pixel clock signal (slave or master mode).
Important When accessed from the analog video input connectors (DVI), the pixel clock,
composite/horizontal synchronization, and vertical synchronization signals of
each PSG form a group of signals. The signals of each group shares the same
direction (input or output) and same signal format (TTL or LVDS). When
accessed from the internal or external auxiliary I/O connectors (HD-44), the
format and direction of the synchronization signals are independent; the board
can both transmit and receive synchronization signals at the same time.
Timers
Each PSG has two timers. These timers can each generate a timer output signal
with up to two pulses; timer output signals allow you to control the exposure time
and other external events related to the video source (such as a strobe). The timer
signals can be output using auxiliary output signals.
The timers are 24-bit timers, allowing each to count up to 16777215 clock ticks
before resetting.
The timers can use one of the following as a clock source:
• A clock that is internally generated. Each timer can use its PSG’s clock generator,
which can generate a single clock with a programmable frequency of 0.8 to
100 MHz. Timers can only use the clock generator of their own PSG.
• A clock from an external source. In this case, you must define the appropriate
auxiliary input signal as a timer-clock input; the timer-clock input signal must
meet the specification of the auxiliary signal. The same timer-clock input can be
used to clock both timers of a PSG.