Specifications

58 Chapter 4: Matrox Solios hardware reference
Type of signal
Max # signals
*
LVDS cam. ctrl Received
with data
LVDS dedicated signals
†
CL connect.
CC1 CC2 CC3 CC4
CL
connect.
Frame valid input 10
VSYNC output 10000
Line valid input 10
HSYNC output 10000
Data valid input 10
Clock input 1 Xclk (CL connect.)
Clock output 10000
*. The maximum # for each signal type cannot always be attained. The actual maximum depends on whether
the required auxiliary signals are available or have been defined as another type.
†. In this column, each signal is a dedicated signal (that is, it cannot be redefined as another type of signal).