Specifications

Connectors on Matrox Solios eA/XA 135
The pinout for DVI connector 1 is as follows:
Pin Hardware signal name
*
MIL constant for
auxiliary signal
†
Digitizer device
number for auxiliary
signal
Description
2+, 1- P3_LVDS/TTL_VSYNC_IO VSYNC input/output for acq. path 3.
3GND Ground.
5+, 4- P2_LVDS/TTL_VSYNC_IO VSYNC input/output for acq. path 2.
6 P3_TTL_AUX(EXP)_OUT M_AUX_IO12 M_DEV3 TTL auxiliary signal (output) for
acquisition path 3, which supports:
timer output (M_TIMER1 on M_DEV3)
or user output (M_USER_BIT2).
7 P3_RS232_RxD RS-232 serial input to acq. path 3 of
frame grabber (UART).
8 P3_RS232_TxD RS-232 serial output from acq. path 3
(UART) to video source.
10+, 9- P3_LVDS/TTL_CHSYNC_IO CSYNC input or HSYNC input/output for
acq. path 3.
11 GND Ground.
13+, 12- P2_LVDS/TTL_CHSYNC_IO CSYNC input or HSYNC input/output for
acq. path 2.
14 P2_TTL_AUX(TRIG)_IN M_AUX_IO1 M_DEV2 TTL auxiliary signal (input) for
acquisition path 2, which supports:
trigger input (trigger controller 0 on acq
path 2), field polarity input, or user
input.
15 GND Ground.
16 P2_RS232_TxD RS-232 serial output from acq. path 2
(UART) to video source.
18+, 17- P3_LVDS/TTL_CLK_IO Clock input/output for acq. path 3.
19 GND Ground.
21+, 20- P2_LVDS/TTL_CLK_IO Clock input/output for acq. path 2.
22 P3_TTL_AUX(TRIG)_IN M_AUX_IO1 M_DEV3 TTL auxiliary signal (input) for
acquisition path 3, which supports:
trigger input (trigger controller 0 on acq
path 3), field polarity input, or user
input.
23 P2_TTL_AUX(EXP)_OUT M_AUX_IO12 M_DEV2 TTL auxiliary signal (output) for
acquisition path 2, which supports:
timer output (M_TIMER1 on M_DEV2)
or user output (M_USER_BIT2).