Service Manual Model #: VIZIO L32HDTV10A V, Inc 320A Kalmus Drive Costa Mesa, CA 92626 TEL : +714-668-0588 FAX :+714-668-9099 Top Confidential
Table of Contents CONTENTS PAGE Sections 1. Features 1-1 2. Specifications 2-1 3. On Screen Display 3-1 4. Factory Preset Timings 4-1 5. Pin Assignment 5-1 6. Main Board I/O Connections 6-1 7. Theory of Circuit Operation 7-1 8. Waveforms 8-1 9. Trouble Shooting 9-1 10. Block Diagram 10-1 11. Spare parts list 11-1 12. Complete Parts List 12-1 Appendix 1. Main Board Circuit Diagram 2. Main Board PCB Layout 3.
VINC Service Manual VIZIO L32HDTV10A COPYRIGHT © 2000 V, INC. ALL RIGHTS RESERVED. IBM and IBM products are registered trademarks of International Business Machines Corporation. Macintosh and Power Macintosh are registered trademarks of Apple Computer, Inc. VINC and VINC products are registered trademarks of V, Inc. VESA, EDID, DPMS and DDC are registered trademarks of Video Electronics Standards Association (VESA). Energy Star is a registered trademark of the US Environmental Protection Agency (EPA).
Chapter 1 Features 1. Built in TV channel selector for TV viewing 2. Simulatnueous display of PC and TV images 3. Connectable to PC’s analog RGB port 4. Built in s-video, HDTV, composite video, HDMI ,TV and DTV out 5. Built in auto adjust function for automatic adjument of screen display 6. Smoothing function enables display of smooth texts and graphics even if image withresolution lower than 1366x768 is magnified 7. Picture In Picture (PIP) funtion to show TV or VCR images 8.
Chapter 2 Specification 1. LCD CHARACTERISTICS Type: WXGA TFT LCD Size: 37 inch Display Size: 37.02 inches (940.3mm) diagonal Outline Dimension: 877.0/878.0 mm (H) x 516.8 mm (V) x 55.5 (D) mm (Typ.) Pixel Pitch: 0.200mm x 0.600mm x RGB Pixel Format: 1366 horiz. By 768 vert. Pixels RGB strip arrangement Contrast ratio: 600(Typ) Luminance, White: 500 cd/m2 (Typ) Display Operating Mode: normally Black Surface Treatment : Hard coating(3H), Anti-glare treatment of the front polarizer Color Depth : 8-bit, 16.
b. Signal Level Video (Y): Analog 0.1Vp-p/75 Video (C): Analog 0.286p-p/75 Sync (H+V): 0.3V below Video (Y) c. Frequency H: 15.734KHz V: 60Hz (NTSC) 3.2.3 F-Type TV RF connector 3.2.3.1 NTSC System: a. Signal Level: Analog 1Vp-p typical(45dB~90dB) b. System :NTSC c. Frequency: 55~801MHz (NTSC) 3.2.3.2 ATSC System a. IF-output level: 1Vp-p minimum b. System: ATSC c. Frequency: 57~863MHz(ATSC) 3.2.4 PC connector 15 pin male D-sub connector a. Pin Assignment : CONFIDENTIAL – DO NOT COPY Page 2-2 File No.
b. Signal Level Video (R, G, B) : Analog 0.7Vp-p/75 Sync (H, V) : TTL level c. Sync Type TTL (Separate / Composite) or Sync. On-Green d. Sync polarity Positive or Negative e. Frequency : H: support to 30K~70KHz V: support to 50~85Hz Pixel Clock: support to 110MHz 3.2.5 HDMI Signal (Digital HD): a. Pin Assignment CONFIDENTIAL – DO NOT COPY Page 2-3 File No.
b. Type: TYPE A c. Polarity: Positive or Negative d. Frequency: H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz (NTSC-1080i) CONFIDENTIAL – DO NOT COPY Page 2-4 File No.
3.2.6 Component signal (Analog HD1 and Analog HD2) 3.2.6.1 Analog HD1 a. Frequency H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz (NTSC-1080i) b. Signal level Y: 1Vp-p Pb: ±0.350Vp-p Pr: ±0.350Vp-p c. Impedance 75 3.2.6.2 Analog HD2 a. Frequency H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz (NTSC-1080i) b. Signal level Y: 1Vp-p Pb: ±0.350Vp-p Pr: ±0.350Vp-p c. Impedance 75 3.2.
8. DIMENSIONS (Physical dimension) Width: 959.9mm. Depth: 311.0mm Height: 748.4mm 9. WEIGHT (Physical weight) a. Net: 25.9kgs b. Gross: 33.5kg 9-1. MOUNTING PRECAUTIONS (1) You must mount a module using holes arranged in four corners or four sides. (2) You should consider the mounting structure so that uneven force (ex. Twisted stress) is not applied to the module. And the case on which a module is mounted should have sufficient strength so that external force is not transmitted directly to the module.
9-2. OPERATING PRECAUTIONS (1) The spike noise causes the mis-operation of circuits. It should be lower than following voltage : V=±200mV(Over and under shoot voltage) (2) Response time depends on the temperature.(In lower temperature, it becomes longer.) (3) Brightness depends on the temperature. (In lower temperature, it becomes lower.) And in lower temperature, response time(required time that brightness is stable after turned on) becomes longer.
Chapter 3 On Screen Display Main unit button Power Input CH ▲ CH ▼ VOL + VOL MUTE / EXIT MENU TV Source A. PICTURE ADJUST: a. PICTURE MODE (USER/ VIVID1 /VIVID2 / VIVID3) b. Adjust the BACKLIGHT (0~100) c. Adjust the BRIGHTNESS (0~100) d. Adjust the CONTRAST (0~100) e. Adjust the COLOR (saturation)(0~100) f. Adjust the TINT (hue) (0~100) g. Adjust the SHARPNESS (0~100) h. CLOSED CAPTION (OFF/CC1/CC2/CC3/CC4/TT1/TT2/TT3/TT4) B. AUDIO ADJUST: a. VOLUME (0~100) b. BASS (0~100) c. TREBLE (0~100) d.
e. SKIP CHANNEL (YES/NO) D. PARENTAL CONTROL: a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT E. PIP SETUP: a. STYLE (OFF/PIP/POP) b. Source (AV1、AV2、AV3、ANALOGHD1、ANALOG HD2、DIGITAL HD RGB、DTV) c. SIZE (SMALL (20%)/MEDIUM (30%)/LARGE (40%)) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT/MIDDLE LEFT /MIDDLE RIGHT/BOTTOM LEFT/BOTTOM CENTER/BOTTOM RIGHT) F. SPECIAL FEATURES: a. LANGUAGE (ENGLISH/FRANCE/SPANISH) b. SLEEP TIMER (OFF/30/60/90/120) c.
C. AUDIO ADJUST: a. VOLUME (0~100) b. BASS (0~100) c. TREBLE (0~100) d. BALANCE (0~100) e. SURROUND (ON/OFF) f. REVERB (OFF, CONCERT, LIVING ROOM, HALL, ARENA) g. MUTE (ON/OFF) h. SPEAKERS (ON/OFF) D. PIP SETUP: a. STYLE (OFF/PIP/POP) b. SOURCE (AV1、AV2、AV3、TV) c. SIZE (SMALL (20%)/MEDIUM(30%)/LARGE (40%)) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT/MIDDLE LEFT /MIDDLE RIGHT/BOTTOM LEFT/BOTTOM CENTER/BOTTOM RIGHT) E. SPECIAL FEATURES: a. LANGUAGE (ENGLISH/FRANCE/SPANISH) b. SLEEP TIMER (OFF/30/60/90/120) c.
f. REVERB (OFF, CONCERT, LIVING ROOM, HALL, ARENA) g. MUTE (ON/OFF) h. SPEAKERS (ON/OFF) i. AUDIO SOURCE(DIGITAL HD/DTV) C. PARENTAL CONTROL: a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT D. PIP SETUP: a. STYLE (OFF/PIP/POP) b. SOURCE (AV1、AV2、AV3、TV) c. SIZE (SMALL (20%)/MEDIUM (30%)/LARGE (40%)) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT/MIDDLE LEFT /MIDDLE RIGHT/BOTTOM LEFT/BOTTOM CENTER/BOTTOM RIGHT) E. SPECIAL FEATURES: a. LANGUAGE (ENGLISH/FRANCE/SPANISH) b.
B. AUDIO ADJUST: a. VOLUME (0~100) b. BASS (0~100) c. TREBLE (0~100) d. BALANCE (0~100) e. SURROUND (ON/OFF) f. REVERB (OFF, CONCERT, LIVING ROOM, HALL, ARENA) g. MUTE (ON/OFF) h. SPEAKERS (ON/OFF) C. PARENTAL CONTROL: a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT D. PIP SETUP: a. STYLE (OFF/PIP/POP) b. SOURCE (AV2、AV3、ANALOGHD1、ANALOG HD2、DIGITAL HD、 RGB、TV) c. SIZE (SMALL (20%)/MEDIUM (30%)/LARGE (40%)) d.
g. Adjust the SHARPNESS (0~100) B. AUDIO ADJUST: a. VOLUME (0~100) b. BASS (0~100) c. TREBLE (0~100) d. BALANCE (0~100) e. SURROUND (ON/OFF) f. REVERB (OFF, CONCERT, LIVING ROOM, HALL, ARENA) g. MUTE (ON/OFF) h. SPEAKERS (ON/OFF) C.DTV OSD a. DTV TUNER SETUP 1. TIME ZONE: α. HAWALL β. EASTTERN TIME γ. INDIANA δ. CENTRAL TIME ε. MOUNTAIN TIME ζ. ARIZONA η. PACIFIC TIME θ. ALASKA 2. AUTO SCAN 3. MANUAL SCAN PRESS (1) ADD-ON MODE (2) RANGE MODE α. FORM CHANNEL(2~69) β. TO CHANNEL(2~69) 4.
2. DIGITAL COLOSED CAPTION α.OFF β.SERVICE1 γ.SERVICE2 δ.SERVICE3 ε.SERVICE4. ζ.SERVICE5 η.SERVICE6 3. DIGITAL CAPTION STYLE PRESS (1) AS BROADCASTER (2)CUSTOM FONT SIZE α.LARGE β.SMALL γ.MEDIUM FONT COLOR α.BLACK β.WHITE γ.GREEN δ.BLUE ε.RED ζ.CYAN η.YELLOW θ.MAGENTA FONT OPACITY α.SOLID β.TRANSLUCENT γ.TRANSPARENT BLACKGROUND COLOR α.BLACK β.WHITE γ.GREEN δ.BLUE ε.RED ζ.CYAN CONFIDENTIAL – DO NOT COPY Page 3-7 File No.
η.YELLOW θ.MAGENTA BLACKGROUND OPACITY α.SOLID β.TRANSLUCENT γ.TRANSPARENT WINDOW COLOR α.BLACK β.WHITE γ.GREEN δ.BLUE ε.RED ζ.CYAN η.YELLOW θ.MAGENTA WINDOW OPACITY α.SOLID β.TRANSLUCENT γ.TRANSPARENT c.PARENTAL CONTROL PASSWORD PRESS 1.0000 2.CHANNEL BLOCK PRESS D. PARENTAL CONTROL: a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT E. PIP SETUP: a. STYLE (OFF/PIP/POP) b. SOURCE (AV1、AV2、AV3、TV) c. SIZE (SMALL (20%)/MEDIUM (30%)/LARGE (40%)) d.
F. SPECIAL FEATURES: a. LANGUAGE (ENGLISH/FRANCE/SPANISH) b. SLEEP TIMER (OFF/30/60/90/120) c. WIDE FORMAT (NORMAL/WIDE) d. RESET ALL SETTING CONFIDENTIAL – DO NOT COPY Page 3-9 File No.
Chapter4 Factory preset timings This timing chart is already preset for the TFT LCD analog & digital display monitors. Refresh Horizontal Vertical Horizontal Vertical Pixel rate Frequency Frequency Polarity Polarity Rate 640x480 60Hz 31.5kHz 59.94Hz N N 25.175 640x480 75Hz 37.5kHz 75.00Hz N N 31.500 800X600 60Hz 37.9kHz 60.317Hz P P 40.000 800x600 75Hz 46.9kHz 75.00Hz P P 49.500 800X600 85Hz 53.7kHz 85.06Hz P P 56.250 1024x768 60Hz 48.4kHz 60.
Chapter5 Pin Assignment The TFT LCD analog display monitors use a 15 Pin Mini D-Sub connector as video input source. Pin Description 1 Red 2 Green 3 Blue 4 Ground 5 Ground 6 R-Ground 7 G-Ground 8 B-Ground 9 +5V for DDC 10 Ground 11 No Connection 12 (SDA) 13 H-Sync (Composite Sync) 14 V-Sync 15 (SCL) Table 1. 1 5 6 11 CONFIDENTIAL – DO NOT COPY 10 15 Page 5-1 File No.
PC connector 15 pin male D-sub connector a. Pin Assignment Refer to Table 1 b. Signal Level Video (R, G, B): Analog 0.7Vp-p/75Ω Sync (H, V): TTL level RGB Signal: a. Sync Type TTL (Separate / Composite) or Sync. On Green b. Sync polarity Positive or Negative c. Video Amplitude RGB: 0.7Vp-p d.
HDMI Signal (Digital HD): a. Pin Assignment Refer to Table 2. b. Type A c. Polarity Positive or Negative d. Frequency H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz (NTSC-1080i) Four-Pin mini DIN S-Video Connector a. Pin Assignment CONFIDENTIAL – DO NOT COPY Page 5-3 File No.
b. Signal Level Video (Y): Analog 0.1Vp-p/75Ω Video (C): Analog 0.286p-p/75 Sync (H+V): 0.3V below Video (Y) Frequency H: 15.734KHz V: 60Hz (NTSC) CONFIDENTIAL – DO NOT COPY Page 5-4 File No.
F-Type TV RF connector NTSC System: a. Signal Level: Analog 1Vp-p typical(45dB~90dB) b. System :NTSC c. Frequency: 55~801MHz (NTSC) ATSC System a. IF-output level: 1Vp-p minimum b. System: ATSC c. Frequency: 57~863MHz(ATSC) Component signal (Analog HD1 and Analog HD2) Analog HD1 a. Frequency H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz (NTSC-1080i) b. Signal level Y: 1Vp-p Pb: ±0.350Vp-p Pr: ±0.350Vp-p c.
Analog HD2 a. Frequency H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz (NTSC-1080i) b. Signal level Y: 1Vp-p Pb: ±0.350Vp-p Pr: ±0.350Vp-p c. Impedance 75Ω RCA-type (Yellow) Composite Video Connector(AV1,AV2,AV3) a. Signal Level Video (Y+C): Analog 1Vp-p/75 Sync (H+V): 0.3V below Video (Y+C) b. Frequency H: 15.734KHz V:60Hz (NTSC) CONFIDENTIAL – DO NOT COPY Page 5-6 File No.
PHONE JACK AUDIO INPUT : a. Signal Level 1Vrms b. Frequency Response 250Hz-20KHz CONFIDENTIAL – DO NOT COPY Page 5-7 File No.
Chapter 6 Block Diagram The TV system block diagram is powered by power board that transforms AC source of 100V~240V AC +/- 10% @ 50/60 HZ into DC 5V & 12V& 24Vsource. The main board receives different types of video signal into the MTK8205 Ic. Afterward, the MTK8205 Ic process the signals control the various functions of the monitor and outputs control signal, video signal and power to the 37” WXGA panel to be displayed. The power send to the panel is first processed by the inverter.
The function of the inverter is to step up the voltage supplied by the main board to the power that is needed to light up the lamps in the panel. Simultaneously, the digital video signals are processed in the panel and the outcome determines the brightness, pixel on/off and the color displayed on the panel. The analog video signals of S-video, YPbPr, TV, PC and A/V all video signals are translated from analog signals into MTK8205 generates the vertical and horizontal timing signals for display device.
Main Board Block Diagram Video Signal RJ11 P11 Audio Signal Communicate Signal 24C02 U17 Control Pin HDMI CON. P1 FFC 50PIN CON. Sil9011 U16 +12V For DTV Signal +5V +3.3V +2.5V 24C02 U18 D_SUB 15PIN P3 KEY BOARD CONN. IR CONN. DDR SDRAM U11,U12 DC/DC FLASH MEMORY U10 DC POWER 12V IN CONN.
Video Board Block Diagram Video Signal Audio Signal Communicate Signal Control Pin I2C Narrow_IF_OP1&OP2 PORT SAW FILTER U7 AGC Amplifiers U8 IF AGC PHILIPS TD1336 U6 I2C Demodulator MT5111 U9 I2C DDR SDRAM U12,U13 FCC 50PIN CON.
Chapter7 Main Board I/o Connections J7 CONNECTION (TOP→BOTTOM) Pin Description 1 “Auto” 2 “Left” 3 “Right” 4 “Down” 5 “Gnd” 6 “Up” 7 “Menu” 8 “Source” 9 “Power” 10 “LED” 11 “IR” 12 “+5V” J1 CONNECTION (TOP→BOTTOM) Pin Description 1 “POWRSW” 2 “+12V” 3 “+12V” 4 “+12V” 5 “GND” 6 “GND” 7 “GND” 8 “GND” 9 “+5V” 10 “+5V” 11 “+5V” 12 “PWM” 13 “BL ON/OFF” CONFIDENTIAL – DO NOT COPY Page 7-1 File No.
J3 CONNECTION (TOP→BOTTOM) Pin Description Pin Description 1 “+3.3V” 16 “HPR” 2 “GND” 17 “HPL” 3 “G/Y” 18 “GNDV” 4 “B/U” 19 “HPDET#” 5 “R/V” 20 “AV3_IN” 6 “LMAIN1” 21 “AV3_GND” 7 “RMAIN1” 22 “AV3L” 8 “+5.0V” 23 “AV3L GND” 9 “GND” 24 “AV3R” 10 “8302IR” 25 “AV3R GND” 11 “8302NET1” 26 “S1Y_IN” 12 “8302NET2” 27 “S1Y_GND” 13 “8302RXD” 28 “S1C_IN” 14 “8302TXD” 29 “S1C_GND” 15 “GNDV” 30 “SVDET2#” CONFIDENTIAL – DO NOT COPY Page 7-2 File No.
J2 CONNECTION (TOP→BOTTOM) Pin Description Pin Description 1 “GND” 26 “GND” 2 “I2C_SW” 27 “VOG3” 3 “OREQUEST#” 28 “VOG2” 4 “OREADY#” 29 “VOG1” 5 “ORESET#” 30 “VOG0” 6 “GND” 31 “GND” 7 “VOPCLK” 32 “VOB7” 8 “VODE” 33 “VOB6” 9 “VOVSYNC” 34 “VOB5” 10 “VOHSYNC” 35 “VOB4” 11 “GND” 36 “GND” 12 “VOR7” 37 “VOB3” 13 “VOR6” 38 “VOB2” 14 “VOR5” 39 “VOB1” 15 “VOR4” 40 “VOB0” 16 “GND” 41 “GND” 17 “VOR3” 42 “AO1SDATA0” 18 “VOR2” 43 “AO1LRCK” 19 “
J8 CONNECTION (TOP→BOTTOM) Pin Description 1 “+5V” 2 “GND” 3 “GND” 4 “+12V” 5 “+12V” CONFIDENTIAL – DO NOT COPY Page 7-4 File No.
Chapter 8 Theory of Circuit Operation The operation of D-SUB 15pin route The D-SUB 15pin is input analog signal to the MTK8205 transfer A/D converter then generates the vertical and horizontal timing signals for display device. The operation of HDMII CON route The HDMI CON is input digital signal the signal is process to the sil9011. Then transfer to the MTK8205, the MTK8205 generates the vertical and horizontal timing signals for display device.
1. The power key through POW and GND to control MTK8205, MTK8205 will receive a low signal to turn on or off system while press the power key. 2. The other key the same as power key . 3. The LED is constructed with two separate LED which color is blue and orange. The MTK8205 direct control the LED’s when MTK8205 (OGO5) is low the LED is orange (Close power) when MTK8205 (OGO5) is high the LED is blue (Open power).
BOLOCK DIAGRAM 1. Video input a. Input Multiplexing 1.component X2 2.composite X3 3.s-videoX1 4.HDMI X1 5.VGA X1 6.RF X2 CONFIDENTIAL – DO NOT COPY Page 8-3 File No.
b. Input formats: 1.support HDTV 480i/480p/720p/1080p 2.support Y/C signal 1VP-P/75Ω 3.support Y/C signal 1VP-P/75Ω 4.support 480i/408p/720p/1080i/1080p 5.support VGA input up to 1366x168@60HZ 6.support NTSC system Frequency 55~801MHZ 7. support ATSC system Frequency 57~863MHZ 2. TV Decoder For pip/pop: Dual identical TVD on chip 3D-comb for both path Dual VBI decoders for the application of V-chip 3. Support Formats: Support NTSC, NTSC-4.
BOLOCK DIAGRAM 4. 2D-Graphic/OSD processor Two OSD planes. Support alpha blending among these two planes and video Support text/bitmap decoder Support line/rectangle/gradient fill Support bitblt Support color key function Support clip mask 65535/256/16/4/2-color bitmap format OSD Automatic vertical scrolling of OSD image Support OSD mirror and upside down CONFIDENTIAL – DO NOT COPY Page 8-5 File No.
5. Microprocessor interface When power is supplied and power key is pressed then the rest circuit lets Reset to low state that will reset the MTK8205 to initial state. After that the Reset will transits to high state and the MTK8205 start to work that microprocessor executes the programs and configures the internal registers. The execution speed of CPU is 133 MHz. a.
b.
c. Scaling Arbitrary ratio vertical/horizontal scaling of video, from1/32X to 32X Advanced linear and non-linear Panorama scaling Programmable Zoom viewer Picture in picture (PIP) Picture in picture d. Display 12/10 10/8 8/6 Dithering processing for LCD display 10bit gamma correction Support Alpha blending for Video and two OSD panel Frame rate conversion 7.
8. Flash Usage Flash is used to store FW code, fonts, bitmaps, and big tables for VGA, Video, and Gamma 2Mbyte is recommended to build a general TV model MTK8205 Flash ROM support test report CONFIDENTIAL – DO NOT COPY Page 8-9 File No.
DDR SDRAM (M13S128168A-6T) Application Pin description CONFIDENTIAL – DO NOT COPY Page 8-10 File No.
Command Truth Table 1. Power-Up and Initialization Sequence The following sequence is required for POWER UP and Initialization. 1. Apply power and attempt to maintain CKE at a low state (all other inputs may be undefined.) - Apply VDD before or at the same time as VDDQ. - Apply VDDQ before or at the same time as VTT & VREF). 2. Start clock and maintain stable condition for a minimum of 200us. 3. The minimum of 200us after stable power and clock (CLK, CLK), apply NOP & take CKE high. 4.
6. Issue a mode register set command for “DLL reset”. The additional 200 cycles of clock input is required to lock the DLL.(To issue DLL reset command, provide “High” to A8 and “Low” to BA0) 7. Issue precharge commands for all banks of the device. 8. Issue 2 or more auto-refresh commands. 9. Issue a mode register set command with low to A8 to initialize device operation. 2. Mode Register Set (MRS) The mode register stores the data for controlling the various operating modes of DDR SDRAM.
3. Precharge The precharge command is used to precharge or close a bank that has activated. The precharge command is issued when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The precharge command can be used to precharge each bank respectively or all banks simultaneously. The bank select addresses (BA0, BA1) are used to define which bank is precharged when the command is initiated. For write cycle, tWR(min.) must be satisfied until the precharge command can be issued.
4. Row Active The Bank Activation command is issued by holding CAS and WE high with CS and RAS low at the rising edge of the clock (CLK). The DDR SDRAM has four independent banks; so two Bank Select addresses (BA0, BA1) are required. The Bank Activation command to the first read or write command must meet or exceed the minimum of RAS to CAS delay time (tRCD min). Once a bank has been activated, it must be precharged before another Bank Activation command can be applied to the same bank.
7. Burst Read Operation Burst Read operation in DDR SDRAM is in the same manner as the current SDRAM such that the Burst read command is issued by asserting CS and CAS low while holding RAS and WE high at the rising edge of the clock (CLK) after tRCD from the bank activation. The address inputs determine the starting address for the Burst, The Mode Register sets type of burst. (Sequential or interleave) and burst length (2, 4, 8).
MX29LV160BTTC (Flash) Application The MX29LV800T/B & MX29LV800AT/AB is a 8-mega bit Flash memory organized as 1M bytes of 8 bits or 512K words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV800T/B & MX29LV800AT/AB is packaged in 44-pin SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. CONFIDENTIAL – DO NOT COPY Page 8-16 File No.
BLOCK DIAGRAM 1. COMMAND DEFINITIONS Device operations are selected by writing specific address and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table 5 defines the valid register command sequences. Note that the Erase Suspend (B0H) and Erase Resume (30H) commands are valid only while the Sector Erase operation is in progress. CONFIDENTIAL – DO NOT COPY Page 8-17 File No.
2. WRITE COMMANDS/COMMAND SEQUENCES To program data to the device or erase sectors of memory, the system must drive WE and CE to VIL, and OE to VIH. The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the Unlock Bypass mode, only two write cycles are required to program a byte, instead of four. The "byte Program Command Sequence" section has details on programming data to the device using both standard and Unlock Bypass command sequences.
After the system writes the auto select command sequence, the device enters the auto select mode. The system can then read auto select codes from the internal register (which is separate from the memory array) on Q7-Q0. Standard read cycle timings apply in this mode. Refer to the Auto select Mode and Auto select Command Sequence section for more information. ICC2 in the DC Characteristics table represents the active current specification for the write mode.
4. READING ARRAY DATA The device is automatically set to reading array data after device power-up. No commands are required to retrieve data. The device is also ready to read array data after completing an Automatic Program or Automatic Erase algorithm. After the device accepts an Erase Suspend command, the device enters the Erase Suspend mode. The system can read array data using the standard read timings, except that if it reads at an address within erase suspended sectors, the device outputs status data.
MT5111 Application: MT5111 Functional Block Diagram MT5111 is fully integrated single-chip 8-VSB , designed specifically for the digital terrestrial. HDTV receivers . The chip is fully compliant with the ATSC A/53 digital TV standard. MT5111 includes a 10-bit A/D converter , 8-VSB demodulator , TCM(Trellis-Coded Modulation). Decoder . and Reed-Solomon Forward Error Correction decoder . Moreover , an internal controller handles the acquisition and tracking to ensure the best receiving performance .
The carrier frequency offset and symbol timing offset are both estimated and compensated by a fully digital synchronizer . The synchronizer also controls the rate conversion in the digital re-sampling device by estimating the sampling frequency offset . All synchronization in MT5111 are integrated in digital circuits , no external VCXO is required. The equalizer is adopted to cancel the effect of multi-path fading channel during signal propagation in the air .
8. 25MHZ crystal for clock generation 9. Full-digital timing recovery , no VCXO is required 10. Full-digital frequency offset recovery with wide acquisition range –1MHZ~+1MHZ 11. Dual digital AGC control for IF and RF respectively 12. MPEG-2 transport stream output in parallel or serial format 13. On-chip error rate estimators for TS packets , TCM decoder , and equalizer 14. EIA/CEA-909 antenna interface 15. Controlled by I2C interface 16. Supports sleep mode to save power consumption 17.
General Feature List : A . Host CPU: 1. ARM 926EJ 2.16K I-Cache and 16K D-Cache 3. 8K Data TCM and 8K instruction 4. JTAG ICE interface 5. Watch Dog timers B . Transport Demuxer : 1. Support 3 independent transport stream inputs 2. Support serial/parallel interface for each transport stream input 3. Support ATSC , DVB , and MPEG2 transport stream inputs. 4. Programmable sync detection. 5. Support DES/3-DES De-scramble. 6. 96 PID filter and 128 section filters. 7. Support TS recording via IEEE1394 interface.
G . Video Processing : 1. Advanced Motion adaptive de-interlace on SDTV resolution. 2. Support clip 3. 3:2/2:2 pull down source detection. 4. Arbitrary ratio vertical/horizontal scaling of video , from 1/15X to 16X. 5. Support Edge preserve. 6. Support horizontal edge enhancement. 7. Support Quad-Picture. H . Main Display : 1. Mixing two video and three OSD and hardware cursor. 2. Contrast/Brightness adjustment. 3. Gamma correction. 4. Picture-in-Picture( PIP ). 5. Picture-Out-Picture( POP ). 6.
M . Peripheral Bus Interface : 1. Support NOR/NAND flash. 2. Support CableCard host control bus. N . Audio : 1. Support Dolby Digital AC-3 decoding. 2. MPEG-1 layer I/II , MP3 decoding. 3. Dolby prologic II. 4. Main audio output : 5.1ch + 2ch ( down mix ) 5. Auxiliary audio output : 2ch. 6. Pink noise and white noise generator. 7. Equalizer. 8. Bass management. 9. 3D surround processing include virtual surround. 10. Audio and video lip synchronization. 11. Support reverberation. 12. SPDIF out. 13. I2S I/F.
MX29LV320BTTC (Flash) Application : The MX29LV320AT/B is a 32-mega bit Flash memory organized as 4M bytes of 8 bits and 2M words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV320AT/B is packaged in 48-pin TSOP and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.
CONFIDENTIAL – DO NOT COPY Page 8-28 File No.
BLOCK DIAGRAM CONFIDENTIAL – DO NOT COPY Page 8-29 File No.
BUS OPERATION--1 Legend: L=Logic LOW=VIL, H=Logic High=VIH, VID=12.0 0.5V, VHH=11.5-12.5V, X=Don't Care, AIN=Address IN, DIN=Data IN,DOUT=Data OUT Notes: 1. When the WP/ACC pin is at VHH, the device enters the accelerated program mode. See "Accelerated Program Operations" for more information. 2.The sector group protect and chip unprotect functions may also be implemented via programming equipment. See the "Sector Group Protection and Chip Unprotection" section. 3.
BUS OPERATION--2 Notes: 1.Code=00h means unprotected, or code=01h protected. 2.Code=99 means factory locked, or code=19h not factory locked. WRITE COMMANDS/COMMAND SEQUENCES To program data to the device or erase sectors of memory , the system must drive WE and CE to VIL, and OE to VIH. An erase operation can erase one sector, multiple sectors , or the entire device. A "sector address" consists of the address bits required to uniquely select a sector.
TABLE A. MX29LV320AT/B COMMAND DEFINITIONS Legend: X=Don't care RA=Address of the memory location to be read. RD=Data read from location RA during read operation. PA=Address of the memory location to be programmed. Addresses are latched on the falling edge of the WE or CE pulse. PD=Data to be programmed at location PA. Data is latched on the rising edge of WE or CE pulse. SA=Address of the sector to be erased or verified. Address bits A20-A12 uniquely select any sector.
STANDBY MODE MX29LV320AT/B can be set into Standby mode with two different approaches. One is using both CE and RESET pins and the other one is using RESET pin only. When using both pins of CE and RESET, a CMOS Standby mode is achieved with both pins held at Vcc ±0.3V. Under this condition, the current consumed is less than 0.2uA (typ.). If both of the CE and RESET are held at VIH, but not within the range of VCC ± 0.3V, the device will still be in the standby mode, but the standby current will be larger.
The system can thus monitor RY/BY to determine whether the reset operation is complete. If RESET is asserted when a program or erase operation is not executing (RY/BY pin is "1"), the reset operation is completed within a time of tREADY (not during Embedded Algorithms). The system can read data tRH after the RESET pin returns to VIH. Refer to the AC Characteristics tables for RESET parameters and to Figure 14 for the timing diagram.
Table B. Write Operation Status Notes: 1.Performing successive read operations from the erase-suspended sector will cause Q2 to toggle. 2.Performing successive read operations from any address will cause Q6 to toggle. 3.Reading the byte/word address being programmed while in the erase-suspend program mode will indicate logic "1" at the Q2 bit. However, successive reads from the erase-suspended sector will cause Q2 to toggle. Fig C. COMMAND WRITE OPERATION CONFIDENTIAL – DO NOT COPY Page 8-35 File No.
Fig D. READ TIMING WAVEFORMS CONFIDENTIAL – DO NOT COPY Page 8-36 File No.
Fig E. RESET TIMING WAVEFORM CONFIDENTIAL – DO NOT COPY Page 8-37 File No.
DDR SDRAM (NT5DS16M16CS-5T) Application : Functional Description The 256Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268, 435, 456 bits. The 256Mb DDR SDRAM is internally configured as a quad-bank DRAM. The 256Mb DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation. The double-data-rate architecture is essentially a 2n prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O pins.
Block Diagram (16Mb x 16) Note: This Functional Block Diagram is intended to facilitate user understanding of the operation of the device; it does not represent an actual circuit implementation. Note: DM is a unidirectional signal (input only), but is internally loaded to match the load of the bidirectional DQ and DQS signals. CONFIDENTIAL – DO NOT COPY Page 8-39 File No.
Pin Configuration - 400mil TSOP II (x4 / x8 / x16) CONFIDENTIAL – DO NOT COPY Page 8-40 File No.
Mode Register Operation Operating Mode The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A12 to zero, and bits A0-A6 set to the desired values. A DLL reset is initiated by issuing a Mode Register Set command with bits A7 and A9-A12 each set to zero, bit A8 set to one, and bits A0-A6 set to the desired values. A Mode Register Set command issued to reset the DLL should always be followed by a Mode Register Set command to select normal operating mode.
Extended Mode Register The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional functions include DLL enable/disable, bit A0; output drive strength selection, bit A1; and QFC output enable/disable, bit A2 (NTC optional). These functions are controlled via the bit settings shown in the Extended Mode Register Definition.
Truth Table a: Commands 1. CKE is high for all commands shown except Self Refresh. 2. BA0, BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 = 1, BA1 = 0 selects ,Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A12 provide the op-code to be written to the selected Mode Register.) 3. BA0-BA1 provide bank address and A0-A12 provide row address. 4.
Write The Write command is used to initiate a burst write access to an active (open) row. The value on the BA0, BA1 inputs selects the bank, and the address provided on inputs A0-Ai, Aj (where [i = 9, j = don’t care] for x8; where [i = 9, j = 11] for x4) selects the starting column location. The value on input A10 determines whether or not Auto Precharge is used.
Operations : Reads Subsequent to programming the mode register with CAS latency, burst type, and burst length, Read bursts are initiated with a Read command. The starting column and bank addresses are provided with the Read command and Auto Precharge is either enabled or disabled for that burst access. If Auto Precharge is enabled, the row that is accessed starts precharge at the completion of the burst, provided tRAS has been satisfied.
Random Read Accesses: CAS Latencies (Burst Length = 2, 4 or 8) CONFIDENTIAL – DO NOT COPY Page 8-46 File No.
Read Command Writes Write bursts are initiated with a Write command, as shown in timing figure Write Command on following: The starting column and bank addresses are provided with the Write command, and Auto Precharge is either enabled or disabled for that access. If Auto Precharge is enabled, the row being accessed is precharged at the completion of the burst. For the generic Write commands used in the following illustrations, Auto Precharge is disabled.
Data for any Write burst may be concatenated with or truncated with a subsequent Write command. In either case, a continuous flow of input data can be maintained. The new Write command can be issued on any positive edge of clock following the previous Write command. The first data element from the new burst is applied after either the last element of a completed burst or the last desired data element of a longer burst which is being truncated.
Data Input (Write) Data Output (Read) WM8776 Application The WM8776 is a high performance, stereo audio codec with five channel input selector. The WM8776 is ideal for surround sound processing applications for home hi-fi, DVD-RW and other audiovisual equipment. Etch ADC channel has programmable gain control with automatic level control. Digital audio output word lengths from 16-32 bits and sampling rates from 32kHZ to 96KHZ are supported.
BLOCK DIAGRAM 1. Audio sample rate The master clock forWM8776 supports DAC and ADC audio sampling rates 256fs to 768fs, where fs is the audio sample frequency (DACLRC or ADCLRC) typically 32KHZ, 44.1KHZ, 48KHZ or 96KHZ (the DAC also supports operation at 128fs and 192fs and 192KHZ sample rate). The master clock is used to operate the digital filters and the noise shaping circuits.
2. DIGITAL AUDIO INTERFACE a. Slave mode The audio interfaces operations in either slave mode selectable using the MS control bit. In slave mode DIN is always an input to the WM8776 and DOUT is always an output. The default is Slave mode. In slave mode (ms=0) ADCLRC, DACLRC, ADCBCLK, DACBCLK are input to the WM8776 . DIN and DACLRC are sampled by the WM8776 on the rising edge of DACBCLK; ADCLRC is sampled on the rising edge of ADCBCLK. ADC data is output on DOUT and changes on the falling edge of ADCBCLK.
b. 2 Wire serial control mode The wm8776 supports software control via a 2-wire serial bus. Many devices can be controlled by the same bus, and each device has a uni ue 7-bit address (this is not the same as the 7-bit address of each register in the wm8776). The wm8776 operates as a slave device only. 2-wire serial interface as shown in the following figure. The wm8776 has two possible device addresses, which can be selected using the CE pin In the L37 LCD TV CE pin is LOW (device address is 34h).
Sil9011 Application The sil9011 provides a complete solution for receiving HDMI compliant digital audio and video. Specialized audio and video processing is available within the sil9011 to easily and cost effectively adds HDMI capability to consumer electronics devices such as digital TVs, plasma displays, LCD TVs and projectors. BLOCK DIAGRAM CONFIDENTIAL – DO NOT COPY Page 8-53 File No.
1. TMDS Digital Core The core performs 10-to-8-bit TMDS decoding on the audio and video received from the three TMDS differential data lines along with a TMDS differential clock. The TMDS core supports link clock rates to 165MHZ, including CE modes to 720P/1080I/1080P. 2. Active port detection The Pane Link core detects an active TMDS clock and actively toggling DE signal.
The receiver can also process the video data before it is output as show below figure 5. I2c Interface to Display Controller The Controller I2c interface (CSDA, CSCL) on the sil9011 is a slave interface capable of running up to 400KHZ. This bus is used to configure the SIL9011 by reading/writing to the appropriate registers. The SIL9011 is accessible on the local I2c bits at two-device address.
BLOCK DIAGRAM 1. I2c Bus I2C BUS is interring bus system controlled by 2 lines (SDA, SCL). Data are transmitted and received in the units of byte and Acknowledge. It is transmitted by MSB first from the Start conditions. The data format is set as shown in the following figure. In the L32 TV MM1492 slave address, ADR terminal is L, and 90H is selected. The following figure indicates the control contents of control registers and switches. CONFIDENTIAL – DO NOT COPY Page 8-56 File No.
2. Switch control table a. Video output 1 b. Audio output 1 c. Audio gain CONFIDENTIAL – DO NOT COPY Page 8-57 File No.
TDA8946 Application In L32 TV the TDA8946AJ is a dual-channel audio power amplifier with DC gain control. It has an output power of 2 × 10 W at an 8 Ω load and a 12 V supply. Block diagram 1. Input configuration The TDA8946AJ inputs can be driven symmetrical (floating) as well as asymmetrical. In the asymmetrical mode one input pin is connected via a capacitor to the signal source and the other input is connected to the signal ground.
2. Output power measurement The output power as a function of the supply voltage is measured on the output pins at THD = 10%,in the L32 LCD TV Vcc=12V so we can see as shown in the following figure output about 7W. CONFIDENTIAL – DO NOT COPY Page 8-59 File No.
3. Mode selection In the L32 LCD TV TDA8946AJ has two functional modes, which can be selected by applying the proper DC voltage to pin MODE. a. Mute — In this mode the amplifier is DC-biased but not operational (no audio output). This allows the input coupling capacitors to be charged to avoid pop-noise. The device is in mute mode when 3.5 V < VMODE < (VCC − 1.5 V). b. Operating — In this mode the amplifier is operating normally. The operating mode is activated at VMODE<1.0V.
Chapter 9 Waveforms 1. PC MODE(1366X768 60HZ) CH1 H-sync (FB46); CH2 V-sync (FB45) GREEN (R194) CONFIDENTIAL – DO NOT COPY Page 9-1 File No.
CH1 VGAHSYNC# (FB46); CH2 VGAVSYNC# (FB45) CH1 VGAVSYNC# (FB45); CH2 GREEN (R194) CONFIDENTIAL – DO NOT COPY Page 9-2 File No.
CH1 VGAL (CE81); CH2 AVOL (R252) CH1 AUSPL (RA12) ; CH2 L+ (UA1 PIN17) CONFIDENTIAL – DO NOT COPY Page 9-3 File No.
CH1 XTALI (U9 PIN A15);CH2 XTALO (U9 PIN B15) 2. AV&TV MODE (AV1/AV2/AV3/TV) VIDEO CH1 (R88); CH2 (Q4 PIN1) CONFIDENTIAL – DO NOT COPY Page 9-4 File No.
CH1 CVBS1+ (U9 PINA2); CH2 CVBS1 (R136) CH1 AV1L (U20 PIN1); CH2 AUO1L_SWO (U20 PIN36) CONFIDENTIAL – DO NOT COPY Page 9-5 File No.
CH1 AUSPL (RA12) ; CH2 L+ (UA1 PIN17) CH1 D_CLK# (U11 PIN46);CH2 D_DQ15(U11 PIN65) CONFIDENTIAL – DO NOT COPY Page 9-6 File No.
CH1 DACMCLK (U22 PIN11);CH2 DOUT (U22 PIN12) CH1 SCL34H(U22 PIN19);CH2 SDA34H (U22 PIN18) CONFIDENTIAL – DO NOT COPY Page 9-7 File No.
3. ANALOG HD MODE (ANALOG HD1/HD2) CH1Y1_IN (R105); CH2 Y (U21 PIN7) CH1Y (R280); CH2 Y+ (C120) CONFIDENTIAL – DO NOT COPY Page 9-8 File No.
CH1 TUL (U20 PIN44); CH2 AUO1L_SWO (U20 PIN 36) CH1 AUSPL (RA12) ; CH2 L+ (UA1 PIN17) CONFIDENTIAL – DO NOT COPY Page 9-9 File No.
4. DIGITAL HD CH1 DATA2+ (P1 PIN 1); CH2 DATA2- (P1 PIN3) CH1 HDMI0 (U16 PIN 124) ;CH2 HDMI15 (U16 PIN 102) CONFIDENTIAL – DO NOT COPY Page 9-10 File No.
CH1 XTLI (U16 PIN85) ;CH2 XTLO (U16 PIN86) CH1 HDMISDA (U16 PIN39);CH2 HDMISCL (U16 PIN40) CONFIDENTIAL – DO NOT COPY Page 9-11 File No.
DTV Mode(Video Board): CH1 AO1BCK (J1 Pin 7) ; CH2 AO1SDATA0 (J1 PIN 9) CH1 VOPCLK (J1 Pin 44) ; CH2 VOB0 (J1 PIN 11) CONFIDENTIAL – DO NOT COPY Page 9-12 File No.
CH1 VOPCLK (J1 Pin 44) ; CH2 VOG0 (J1 PIN 21) CH1 VOPCLK (J1 Pin 44) ; CH2 VOR0 (J1 PIN 31) CONFIDENTIAL – DO NOT COPY Page 9-13 File No.
CH1 XTAL1 (C63) ; CH2 XTAL2 (C62) CH1 OPWM0 (R42) ; CH2 OXTALI (R43) CONFIDENTIAL – DO NOT COPY Page 9-14 File No.
5. POWER ON/OFF CH1 DV120B (F1); CH2 GPIO (R3); POWER ON CONFIDENTIAL – DO NOT COPY Page 9-15 File No.
CH1 DV120B (F1); CH2 GPIO (R3); POWER OFF CH1 DV50B (U7 PIN8); CH2 GPIO (R3); POWER ON CONFIDENTIAL – DO NOT COPY Page 9-16 File No.
CH1 DV50B (U7 PIN8); CH2 GPIO (R3); POWER OFF CH1 DV120B (U6 PIN1); CH2 AV_V90 (U6 PIN3) POWER ON CONFIDENTIAL – DO NOT COPY Page 9-17 File No.
CH1 DV120B (U6 PIN1); CH2 AV_V90 (U6 PIN3) POWER OFF CH1 DV50A (U4 PIN1); CH2 DV33A (F3) AC POWER ON CONFIDENTIAL – DO NOT COPY Page 9-18 File No.
CH1 DV50A (U4 PIN1); CH2 DV33A (F3) AC POWER OFF CH1 DV33A (U5 PIN 1); CH2 DV18A (U5 PIN2) AC POWER ON CONFIDENTIAL – DO NOT COPY Page 9-19 File No.
CH1 DV33A (U5 PIN 1); CH2 DV18A (U5 PIN2) AC POWER OFF CH1 DV50B(U14 PIN 3); CH2 DV25 (U14 PIN2) POWER ON CONFIDENTIAL – DO NOT COPY Page 9-20 File No.
CH1 DV25 (U13 PIN7); CH2 D1V25 (U13 PIN3) POWER OFF CH1 GPIO (R3); CH2 LVDS-SEQ (R10) POWER ON CONFIDENTIAL – DO NOT COPY Page 9-21 File No.
CH1 GPIO (R3); CH2 LVDS-SEQ (R10) POWER OFF CH1 GPIO (R3); CH2 ATSC-SW(R121) POWER ON CONFIDENTIAL – DO NOT COPY Page 9-22 File No.
CH1 GPIO (R3); CH2 ATSC-SW(R121) POWER OFF CONFIDENTIAL – DO NOT COPY Page 9-23 File No.
Chapter 10 Trouble shooting MONITOR DISPLAY NOTHING (PC MODE) Start N0 LED is lighted 1. 2. 3. 4. Is Power board output +5V? Is J1 connector good? Is DC-DC OK? Is U4 (3.3V) working ok? Yes N0 LED is lighting? It is in power saving 1. Check video cable 2. Is the timing supported? 3. Check sync input 4. Check VGASOG rout if analog (SOG) Yes N0 Is backlight on? 1.Check J1 PIN 1 2.Is inverter ok? Yes Yes N0 U9 no data out? It means data to LVDS 1.Is J6 connecting well? 2.Check J1 +5V&+12V 3.
(TV, COMPOSITE VIDEO1, 2, 3, S-VIDEO) IS NOT DISPLAY CORRECTLY Start N0 1.Check video 2.Check DVD player Input signal good? Yes N0 1.Check P2 signal 2.Check signal between P2 and U20 (IF AV1/AV2 mode) 3.Check Tuner &U20 (IF TV mode) 4.Check J4&J6 (IF AV3&S-Video) 5.Check U20 POWER +9V 6.Check U22 data input/output U20 input correct? Yes N0 1.Check signal between U20 and U9 U20 output correct? Yes N0 LVDS output correct? 1.Check signal between U20 and U9 2.Check U9 clock (27MHz) 3.
(COMPONENT1, 2) IS NOT DISPLAY CORRECTLY Start N0 1.Check video 2.Check host’s setting Input signal good? Yes N0 1.Check signal between P8&U21 2.Check U21 power 3.3V U21 input correct? Yes N0 1.Check signal between U21&U9 2.Check U9 Clock (27MHZ) U9 input correct? Yes N0 LVDS output correct ? 1.Check U9 2.Check U9 power 3.3V 1.8V Yes 1.Is J6 connected good? 2.Is panel working ok? END CONFIDENTIAL – DO NOT COPY Page 10-3 File No.
(HDMI) IS NOT DISPLAY CORRECTLY Start N0 1.Check video 2.Check host’s setting Input signal good? Yes N0 1.Check p1 connect 2.Check signal between P1 and U16 U16 input correct? Yes N0 U16 no data out ? 1.Check U16 power 2.Check between signal U16 and U9 3.Check clock 28.224MHZ Yes 1.Is J6 connected good? 2.Is panel working ok? END CONFIDENTIAL – DO NOT COPY Page 10-4 File No.
TROUBLE OF DC-DC CONVERTER Start N0 J1 PIN 9,10,11 The voltage is about + 5V 1.Check power board 2.Check power cable connection J1 N0 The voltage is about + 12V while power switch on 1.J1 connection good 2.Check U9 GPIO Pin 3.Check power board Yes J1 PIN 2,3,4,5 Yes N0 Yes N0 U7 pin 5 6 7 8 U4 pin2 The voltage is about +5V while power switch on 1.J1 connection good 2. Check U9 GPIO Pin The voltage is about +3.3V 1.J1 to connection good? 2.
TROUBLE OF DDC READING Start N0 Support DDC1/2B 1.Analog cable ok? 2.Check signal (U18 to P3) 3.Check U18 Voltage 4.Is compliant protocol? Analog DDC OK? Yes N0 HDMIDDC OK? Support DDC1/2B 1.Analog cable ok? 2.Check signal (U17 to P1) 3.Check U17 Voltage 4.Is compliant protocol? Yes END CONFIDENTIAL – DO NOT COPY Page 10-6 File No.
TROUBLE OF THE DTV CONFIDENTIAL – DO NOT COPY Page 10-7 File No.
Chapter 11 Spare Parts List PART NO DESCRIPTION LOC QTY 0185-1202-0073 FUSE 125V/2A SMD (R45102) L-F F3 0185-1302-0073 FUSE 125V/3A SMD (R451003) F1 1 0303-3000-0010 TV JACK 3/8-32UNEF (RF JACK) TU1-1 1 0304-1000-0110 CONN. HDMI 19P 90' SMD With Flange L-F P1 1 0320-4000-0142 POWER CORD 110V UL/CSA 1800mm BLK N.M.
Chapter 12 Complete Parts List 9632-8500-2143 LCD TV MONITOR 32'' L32 HDTV10A(AUO)(ABS,433C)(MTK) ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 1 3320-0042-0334 BASE ASS'Y (TM-32)(ABS, 877C) 1 2 3320-0092-0312 1 3 3320-0102-0331 PACKING ASS'Y VIZIO L32 HDTV10A(MTK) PANEL ASS'Y VIZIO L32 HDTV10A (AUO)(ABS,433C)(MTK) CONFIDENTIAL – DO NOT COPY 1 Page 12-1 File No.
3320-0042-0334 BASE ASS'Y (TM-32)(ABS, 877C) ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 1 1701-0516-2010 BASE (TM-32V)(ABS, 877C) 1 2 1701-1000-0180 BASE FOOT ( φ 18.0*2.0t, PORON ) 8 3 1701-1000-0430 BASE FOOT (TM-32V) 4 4 1712-0100-8110 BASE BRACKET BOTTOM (TM-32V) 2 5 1712-0100-8120 BASE BRACKET (TM-32V) 2 6 1720-3004-0820 MAC. SCREW-MF M4.0*8.0L,NI 8 7 1721-3004-0820 TAP.SCREW-TR #4.0*8.0L,Ni 8 CONFIDENTIAL – DO NOT COPY Page 12-2 File No.
3320-0092-0312 PACKING ASS'Y VIZIO L32 HDTV10A(MTK) ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 2 1701-0800-1730 WIRE CLIP (VIZIO C20L ) (PC,TRANSPARENT/877C) REAR PLATE VIZIO L32 HDTV10A(MTK) 3 1925-1000-2510 EPS FORM_TR (TM-32V) 1 4 1925-1000-2520 EPS FORM_TL (TM-32V) 1 5 1925-1000-2550 EPS FORM_BR (TM-32V) 1 6 1925-1000-2560 EPS FORM_BL (TM-32V) 1 1 1701-0516-0010 1 1 7 1925-1100-1970 PE BAG (850.0L*950.0W*0.
3320-0102-0331 PANEL ASS'Y VIZIO L32 HDTV10A (AUO)(ABS,433C)(MTK) ITEM M/S LOCATION PART NO. 1 0211-0315-0677 2 0260-0000-0290 DESCRIPTION Q’TY 3 0335-0008-0090 LCD MODULE 31.5'' TFT T315XW01(V5)(AU) AC INLET +VHR5P 1617#22 700mm 1015#18 100mm CORE SPEAKER 6ohm 10W 1020*620mm 4 0460-1004-0301 WH PH4P-PH4P 1061#26 80mm 1 1 1 1 5 0460-1012-0171 WH PH12P-PH12P 1061#26 450mm SHIELDING 1 6 0460-1105-0080 WH XH5P-PH5P 1007#24 100mm 1 7 0460-2830-0092 FFC 30P(0.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 50 1947-1200-2410 ACETATE CLOTH TAPE ( 醋酸布膠帶 ) 60*90mm 1 51 1947-1700-0020 SHIELDING AL. TAPE (45.0*25.0) 1 52 1947-1700-0050 SHIELDING AL. TAPE (50.0*40.0) 3 53 1947-1700-0130 SHIELDING AL.TAPE (70.0*50.0) 1 54 1947-1700-0260 GASKET BLOCK (10.0*10.5*60.0mm) 4 55 1947-1800-0030 GASKET BLOCK (10*17*60) 6 56 1947-1800-0460 GASKET BLOCK (3.0H*10.0W*100.0L mm) 2 57 1947-1800-0490 GASKET BLOCK (12L*10W*2.
3320-0012-0156 LCD DISPLAY BD ASS'Y (VIZIO L32) ITEM M/S LOCATION 1 PART NO. 0170-1740-1412 DESCRIPTION Q’TY AJD1 0451-2003-1263 0451-2000-1266 PCB DISPLAY BD V0 141*25*1.6t (VIZIO L32) WAFER 2.00mm 12P 90' KINK (A2001WR2-12P) L-F WAFER 2.0mm 12P 90' DIP KINK (M242612R) L-F 4 AJD2 0451-2000-0466 WAFER 2.
3320-0012-0187 VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) ITEM M/S LOCATION PART NO. 1 332000120187A 2 332000120187M 3 332000120187S CONFIDENTIAL – DO NOT COPY DESCRIPTION Q’TY VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) AI VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) MI VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD 1 1 1 Page 12-7 File No.
3320-0012-0189 LCD IR BD ASS'Y (VIZIO L32) ITEM M/S LOCATION 1 2 CI3 PART NO. DESCRIPTION Q’TY 0170-1640-0302 PCB IR BD V0 30*25*1.6t (VIZIO L32) 1 0111-1104-5102 C/C DISK 0.1UF 50V Y5V F-K 1 3 DI1 0440-5000-0030 LED L-3WYGW 3 ψ 1 4 JI1 0451-2000-0466 WAFER 2.
3320-0062-0146 CONNECTOR BD ASS'Y VIZIO L32 HDTV10A(MTK) ITEM M/S LOCATION 1 C5 SS 4 5 C6 SS 6 0111-3104-1637 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0303-1000-0304 Q’TY 1 1 1 8 J2 0300-3041-0090 CONN. B TO FPC FH12-30S-0.5SH CONN. B TO FPC 0.5mm 30P 90' SMD (AF7301-N2G1Z) L-F S-VIDEO 4PIN 90' (2MJ-0602-005) L-F 9 J3 0302-0350-0012 PHONE JACK 3.
3320-0092-0393 ACCESSARY ASS'Y VIZIO L32 HDTV10A(MTK) ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 2 0321-0000-0411 POWER CORD 110V UL/CSA 1800mm BLK N.M. (VINC) AV CABLE RCA(Y/W/R) 1800mm BLK (VINC) 3 0602-3000-0020 Battery Zn-Carbon 1.5V AA 4 0980-0303-5010 REMOTE CONTROL Vinc VIZIO L32 1 5 1925-1100-0230 PE BAG 320*230*0.04T 1 1 0320-4000-0142 1 1 2 6 1925-1100-0280 PE BAG (180W*290L*0.04t)(PE-LD)(ACC.
3320-0102-0150 MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 1 332001020150A MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) AI 1 2 332001020150M MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) MI 1 3 332001020150S MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD 1 CONFIDENTIAL – DO NOT COPY Page 12-11 File No.
3320-0012-0187A VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) AI ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 1 C11 0103-1221-1211 E/C VZ 220uF 16V 105'C F-T (6.3*11mm) 2 C111 0103-1100-1511 E/C VT 10uF 50V 105'C F-T (5*11mm) 1 3 C12 0103-1221-1211 E/C VZ 220uF 16V 105'C F-T (6.3*11mm) 1 4 C122 0103-1100-1511 E/C VT 10uF 50V 105'C F-T (5*11mm) 1 5 C135 0103-1479-1511 E/C VT 4.7uF 50V 105'C F-T (5*11mm) 1 6 C140 0103-1479-1511 E/C VT 4.
332000120187M VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) MI ITEM M/S 1 2 SS 3 4 C4 SS 5 6 LOCATION C13 C8 SS PART NO. DESCRIPTION 0103-6102-1212 E/C HF 1000uF 16V 105'C F (10*20) 0103-6102-1210 E/C HF 1000uF 16V 105'C N-F (10*20) Q’TY 1 0103-6101-1311 E/C HF 100uF 25V 105'C F-T (6.3*11mm) 0102-2101-1370 E/C L-L 100uF 25V 105'C NF-T 6.3*11 (KY LF) 1 0103-6101-1311 E/C HF 100uF 25V 105'C F-T (6.3*11mm) 0102-2101-1370 E/C L-L 100uF 25V 105'C NF-T 6.
3320-0012-0187S VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD ITEM M/S LOCATION PART NO. 1 332000120187B 2 332000120187T CONFIDENTIAL – DO NOT COPY DESCRIPTION Q’TY VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD BOT VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD TOP 1 1 Page 12-14 File No.
3320-0102-0150A MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) AI ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 1 CA2 0103-1102-1216 E/C VZ 1000uF 16V 105'C F (10*12.5) 2 CA4 0103-1220-1211 E/C VT 22uF 16V 105'C F-T (5*11mm) 1 3 CA6 0103-1471-1211 E/C VZ 470uF 16V 105'C F-T (8*11.5mm) 1 4 CA7 0103-1471-1211 E/C VZ 470uF 16V 105'C F-T (8*11.5mm) 1 5 CE1 0103-1221-1211 E/C VZ 220uF 16V 105'C F-T (6.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 55 CE62 0103-1220-1211 E/C VT 22uF 16V 105'C F-T (5*11mm) 1 56 CE63 0103-1229-1511 E/C VT 2.2uF 50V 105'C F-T (5*11mm) 1 57 CE64 0103-1229-1511 E/C VT 2.
3320-0102-0150M MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) MI ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 1 J1 0451-2000-1366 WAFER 2.0mm 13P 90' DIP KINK (M242613R) L-F 2 J5 0451-2500-0443 WAFER 2.50mm 4P 90' KINK (A2501WR2-4P) L-F 1 1 3 J7 0451-2000-1266 WAFER 2.0mm 12P 90' DIP KINK (M242612R) L-F 1 4 J8 0451-2000-0566 WAFER 2.0mm 5P 90' DIP KINK (M24265R) L-F 1 5 L15 0370-0000-1011 FERRITE CORE RH 3.5X6X1.0(W)X2 L-F 1 6 L19 0370-0000-1011 FERRITE CORE RH 3.5X6X1.
3320-0102-0150S MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD ITEM M/S LOCATION PART NO. 1 332001020150B 2 332001020150T CONFIDENTIAL – DO NOT COPY DESCRIPTION Q’TY MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD BOT MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD TOP 1 1 Page 12-18 File No.
3320-0012-0187B VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD BOT ITEM M/S 1 2 SS 3 4 C101 SS 5 6 C102 SS 7 8 C103 SS 9 10 C104 SS 11 12 C105 SS 13 14 C106 SS 15 16 C107 SS 17 18 C108 SS 19 20 C109 SS 21 22 C110 SS 23 24 C112 SS 25 26 C113 SS 27 28 C114 SS 29 30 C115 SS 31 32 C116 SS 33 34 C117 SS 35 36 C118 SS 37 38 C119 SS 39 40 C120 SS 41 42 C121 SS 43 44 C123 SS 45 46 C124 SS 47 48 C125 SS 49 50 C126 SS 51 52 LOCATION C100 C127 SS PART NO.
ITEM M/S 53 54 C128 SS 55 56 C129 SS 57 58 C130 SS 59 60 C131 SS 61 62 C132 SS 63 64 C133 SS 65 66 C134 SS 67 68 C136 SS 69 70 C137 SS 71 72 C139 SS 73 74 C14 SS 75 76 C142 SS 77 78 C143 SS 79 80 C144 SS 81 82 C145 SS 83 84 C146 SS 85 86 C147 SS 87 88 C15 SS 89 90 C158 SS 91 92 C160 SS 93 94 C161 SS 95 96 C162 SS 97 98 C163 SS 99 100 C165 SS 101 102 C166 SS 103 104 C167 SS 105 106 C168 SS 107 108 C169 SS 109 110 111 LOCATION C170 SS C171 PART NO.
ITEM 112 M/S SS 113 114 SS C173 SS 117 118 C174 SS 119 120 C175 SS 121 122 C176 SS 123 124 C177 SS 125 126 C178 SS 127 128 C179 SS 129 130 C180 SS 131 132 C181 SS 133 134 C182 SS 135 136 C183 SS 137 138 C184 SS 139 140 C186 SS 141 142 C187 SS 143 144 C188 SS 145 146 C189 SS 147 148 C190 SS 149 150 C191 SS 151 152 C192 SS 153 154 C193 SS 155 156 C194 SS 157 158 C195 SS 159 160 C198 SS 161 162 C199 SS 163 164 C200 SS 165 166 C201 SS 167 168 C202 SS 169
ITEM M/S 171 172 C205 SS 173 174 C208 SS 175 176 C209 SS 177 178 C22 SS 179 180 C237 SS 181 182 C27 SS 183 184 C30 SS 185 186 C35 SS 187 188 C57 SS 189 190 C61 SS 191 192 C65 SS 193 194 C66 SS 195 196 C67 SS 197 198 C68 SS 199 200 C69 SS 201 202 C70 SS 203 204 C71 SS 205 206 C72 SS 207 208 C73 SS 209 210 C75 SS 211 212 C76 SS 213 214 C77 SS 215 216 C78 SS 217 218 C79 SS 219 220 C80 SS 221 222 C81 SS 223 224 C83 SS 225 226 C84 SS 227 228 229 LOCATION
ITEM 230 M/S SS 231 232 SS C88 SS 235 236 C89 SS 237 238 C9 SS 239 240 PART NO. 0112-3104-1637 C87 233 234 LOCATION C90 SS DESCRIPTION Q’TY C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.
332000120187T VIDEO BOX BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD T ITEM M/S LOCATION 1 C138 SS 4 5 C141 SS 6 7 C149 SS 8 9 C151 SS 10 11 C152 SS 12 13 C153 SS 14 15 C154 SS 16 17 C155 SS 18 19 C156 SS 20 21 C157 SS 22 23 C159 SS 24 25 C16 SS 26 27 C196 SS 28 29 C197 SS 30 31 C204 SS 32 33 C21 SS 34 35 C23 SS 36 37 C24 SS 38 39 C241 SS 40 41 C28 SS 42 43 C3 SS DESCRIPTION Q’TY 0111-3104-1637 PCB VIDEO BOX BD FR4 140*140*1.6t 4M (L37 HDTV_ATSC) C/M Multi. 0.
ITEM 54 M/S SS 55 56 C53 SS 57 58 C54 SS 59 60 C56 SS 61 62 C58 SS 63 64 C59 SS 65 66 C6 SS 67 68 C60 SS 69 70 C62 SS 71 72 C63 SS 73 74 C7 SS 75 76 LOCATION C95 SS PART NO. DESCRIPTION 0112-3473-2517 C/M Multi. 0.047uF 25V X7R 0111-3473-2517 C/M Multi. 0.047uF 25V X7R 0402 0112-3473-2517 C/M Multi. 0.047uF 25V X7R Q’TY 0402 1 0402 0111-3105-1636 C/M MULTI 1uF 16V Y5V 0603 0112-3105-1636 C/M Multi. 1.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 105 RP10 0141-2209-3851 ARRAY RES. A(X) 22ohm 4R J 8P 1 106 RP11 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 107 RP12 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 108 RP13 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 109 RP14 0141-2209-3851 ARRAY RES. A(X) 22ohm 4R J 8P 1 110 RP16 0141-4709-3851 ARRAY RES. A(X) 47ohm 4R J 8P 1 111 RP17 0141-7509-3851 ARRAY RES.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 164 R52 0130-7509-1654 RES. CF 75ohm 1/16W J 0402 1 165 R53 0130-4709-1654 RES. CF 47ohm 1/16W J 0402 1 166 R54 0130-7509-1654 RES. CF 75ohm 1/16W J 0402 1 167 R55 0130-4709-1654 RES. CF 47ohm 1/16W J 0402 1 168 R56 0130-7509-1654 RES. CF 75ohm 1/16W J 0402 1 169 R57 0130-2209-1654 RES. CF 22ohm 1/16W J 0402 1 170 R59 0130-2209-1654 RES. CF 22ohm 1/16W J 0402 1 171 R6 0130-0000-1654 RES.
332001020150B MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD BOT ITEM M/S 1 2 SS 3 4 CB100 SS 5 6 CB101 SS 7 CB102 8 SS 9 SS 10 11 CB104 SS 12 13 CB105 SS 14 15 CB106 SS 16 17 CB107 SS 18 19 CB108 SS 20 21 CB109 SS 22 23 CB110 SS 24 25 CB111 SS 26 27 CB112 SS 28 29 CB113 SS 30 31 CB114 SS 32 33 CB115 SS 34 35 CB118 SS 36 37 CB119 SS 38 39 CB122 SS 40 41 CB123 SS 42 43 CB124 SS 44 45 CB125 SS 46 47 CB126 SS 48 49 CB131 SS 50 51 CB132 SS 52 53 54 LOCATION CB
ITEM 55 M/S SS 56 57 SS CB147 SS 60 61 CB148 SS 62 63 CB149 SS 64 65 CB151 SS 66 67 CB152 SS 68 69 CB154 SS 70 71 CB155 SS 72 73 CB156 SS 74 75 CB157 SS 76 77 CB158 SS 78 79 CB159 SS 80 81 CB160 SS 82 83 CB161 SS 84 85 CB162 SS 86 87 CB163 SS 88 89 CB2 SS 90 91 CB23 SS 92 93 CB24 SS 94 95 CB25 SS 96 97 CB26 SS 98 99 CB29 SS 100 101 CB30 SS 102 103 CB31 SS 104 105 CB32 SS 106 107 CB35 SS 108 109 CB36 SS 110 111 CB37 SS 112 113 114 PART NO.
ITEM 115 M/S SS 116 117 SS CB45 SS 120 121 CB46 SS 122 123 CB47 SS 124 125 CB53 SS 126 127 CB57 SS 128 129 CB61 SS 130 131 CB62 SS 132 133 CB72 SS 134 135 CB73 SS 136 137 CB74 SS 138 139 CB75 SS 140 141 CB76 SS 142 143 CB77 SS 144 145 CB78 SS 146 147 CB79 SS 148 149 CB80 SS 150 151 CB81 SS 152 153 CB82 SS 154 155 CB83 SS 156 157 CB84 SS 158 159 CB85 SS 160 161 CB86 SS 162 163 CB87 SS 164 165 CB88 SS 166 167 CB89 SS 168 169 CB90 SS 170 171 CB91 SS 172
ITEM M/S 174 175 C24 SS 176 177 LOCATION C8 SS PART NO. DESCRIPTION 0111-3105-1636 C/M MULTI 1uF 16V Y5V 0603 0112-3105-1636 C/M Multi. 1.0uF 16V Y5V 0603 0111-3105-1636 C/M MULTI 1uF 16V Y5V 0603 0112-3105-1636 C/M Multi. 1.
332001020150T MAIN BD ASS'Y VIZIO L32 HDTV10A(MTK) SMD TOP ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 2 CA1 0111-3104-2516 PCB MAIN BD FR4 275*155*1.6t 4M (VIZIO L37 HDTV) C/M Multi. 0.1uF 25V X7R 0603 3 CA10 0111-3474-1636 C/M Multi. 0.47uF 16V Y5V 0603 1 4 CA11 0111-3474-1636 C/M Multi. 0.47uF 16V Y5V 0603 1 5 CA12 0111-3474-1636 C/M Multi. 0.47uF 16V Y5V 0603 1 6 CA13 0111-3104-2516 C/M Multi. 0.1uF 25V X7R 0603 1 7 CA16 0112-3224-2516 C/M Multi. 0.
ITEM 54 M/S SS 55 56 SS CB150 SS 59 60 CB153 SS 61 62 PART NO. 0112-3104-1637 CB15 57 58 LOCATION CB16 SS DESCRIPTION Q’TY C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0111-3104-1637 C/M Multi. 0.
ITEM M/S 113 114 CB34 SS 115 116 CB4 SS 117 118 CB40 SS 119 120 CB41 SS 121 122 CB5 SS 123 124 CB51 SS 125 126 CB52 SS 127 128 CB54 SS 129 130 CB55 SS 131 132 CB58 SS 133 134 CB59 SS 135 136 CB6 SS 137 138 CB60 SS 139 140 CB63 SS 141 142 CB64 SS 143 144 CB65 SS 145 146 CB66 SS 147 148 CB67 SS 149 150 CB68 SS 151 152 CB69 SS 153 154 CB7 SS 155 156 CB70 SS 157 158 CB71 SS 159 160 CB9 SS 161 162 CB92 SS 163 164 CB93 SS 165 166 CB94 SS 167 168 CB95 SS 16
ITEM M/S 172 173 LOCATION CE16 SS PART NO. DESCRIPTION 0111-3103-5116 C/M MULTI 0.01UF 50V X7R 0603 0112-3103-5116 C/M Multi. 0.01uF 50V X7R 0603 Q’TY 1 174 CE19 0111-3104-2516 C/M Multi. 0.1uF 25V X7R 0603 1 175 C1 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 1 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 176 SS 177 178 C100 SS 179 180 C101 SS 0111-3150-5107 C/M Multi. 15PF 50V NPO 0402 0112-3150-5107 C/M Multi. 15PF 50V NPO 0402 0111-3150-5107 C/M Multi.
ITEM 231 M/S SS 232 233 LOCATION C137 SS PART NO. DESCRIPTION 0112-3473-2517 C/M Multi. 0.047uF 25V X7R 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 0112-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 Q’TY 0402 1 234 C14 0111-3103-1637 C/M Multi. 0.01uF 16V Y5V 0402 1 235 C140 0111-3473-2517 C/M Multi. 0.047uF 25V X7R 0402 1 0112-3473-2517 C/M Multi. 0.047uF 25V X7R 236 SS 0402 237 C142 0111-3101-5107 C/M Multi. 100PF 50V NPO J 0402 1 238 C143 0111-3101-5107 C/M Multi.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 290 C46 0111-3103-1637 C/M Multi. 0.01uF 16V Y5V 0402 291 C47 0111-3103-1637 C/M Multi. 0.01uF 16V Y5V 0402 1 292 C48 0111-3330-5107 C/M Multi. 33PF 50V NPO 0402 1 293 C49 0111-3330-5107 C/M Multi. 33PF 50V NPO 0402 1 294 C5 0111-3103-1637 C/M Multi. 0.01uF 16V Y5V 0402 1 295 C50 0111-3104-1637 C/M Multi. 0.1uF 16V Y5V 0402 1 0112-3104-1637 C/M Multi. 0.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 349 C96 0111-3103-1637 C/M Multi. 0.01uF 16V Y5V 0402 1 350 C97 0111-3103-1637 C/M Multi. 0.01uF 16V Y5V 0402 1 351 C98 0111-3105-1636 C/M MULTI 1uF 16V Y5V 0603 1 0112-3105-1636 C/M Multi. 1.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 408 FB28 0130-0000-0055 RES. CF 0.0ohm 1/10W J 0603 1 409 FB29 0370-0001-4773 CHIP BEAD CORE 80ohm (MCB1608H800GA) LF 1 410 FB3 0370-0001-4773 CHIP BEAD CORE 80ohm (MCB1608H800GA) LF 1 411 FB30 0370-0001-4773 CHIP BEAD CORE 80ohm (MCB1608H800GA) LF 1 412 FB31 0130-0000-1858 RES. CF 0.0ohm 1/8W J 0805 1 413 FB32 0130-0000-1858 RES. CF 0.0ohm 1/8W J 0805 1 414 FB33 0130-0000-0055 RES. CF 0.
ITEM M/S LOCATION PART NO.
ITEM 521 M/S LOCATION SS 522 Q6 523 SS 524 SS 525 Q7 526 SS 527 SS 528 Q8 529 SS 530 SS 531 Q9 532 SS 533 SS PART NO.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 580 RN34 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 581 RN35 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 582 RN36 0141-4701-3851 ARRAY RES. A(X) 4.7Kohm 4R J 8P 1 583 RN37 0141-4701-3851 ARRAY RES. A(X) 4.7Kohm 4R J 8P 1 584 RN38 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 585 RN39 0141-3309-3851 ARRAY RES. A(X) 33ohm 4R J 8P 1 586 RN4 0141-7509-3851 ARRAY RES.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 640 R152 0130-1002-1654 RES. CF 10Kohm 1/16W J 0402 1 641 R153 0130-4703-1654 RES. CF 470Kohm 1/16W J 0402 1 642 R154 0130-4709-1654 RES. CF 47ohm 1/16W J 0402 1 643 R155 0130-2200-1654 RES. CF 220ohm 1/16W J 0402 1 644 R156 0130-1002-1654 RES. CF 10Kohm 1/16W J 0402 1 645 R159 0130-4703-1654 RES. CF 470Kohm 1/16W J 0402 1 646 R16 0130-3300-1654 RES. CF 330ohm 1/16W J 0402 1 647 R160 0130-4703-1654 RES.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 700 R211 0130-1000-1654 RES. CF 100ohm 1/16W J 0402 701 R212 0130-0000-1654 RES. CF 0ohm 1/16W J 0402 1 1 702 R213 0130-1000-1654 RES. CF 100ohm 1/16W J 0402 1 703 R214 0130-0000-1654 RES. CF 0ohm 1/16W J 0402 1 704 R215 0130-2209-1654 RES. CF 22ohm 1/16W J 0402 1 705 R217 0130-2200-1654 RES. CF 220ohm 1/16W J 0402 1 706 R218 0130-1000-1654 RES. CF 100ohm 1/16W J 0402 1 707 R219 0130-0000-1654 RES.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 759 R274 0130-4701-1654 RES. CF 4.7Kohm 1/16W J 0402 1 760 R275 0130-4701-1654 RES. CF 4.7Kohm 1/16W J 0402 1 761 R277 0130-3301-1654 RES. CF 3.3Kohm 1/16W J 0402 1 762 R278 0130-1001-1654 RES. CF 1Kohm 1/16W J 0402 1 763 R279 0130-1001-1654 RES. CF 1Kohm 1/16W J 0402 1 764 R28 0130-0000-1654 RES. CF 0ohm 1/16W J 0402 1 765 R280 0130-4701-1654 RES. CF 4.7Kohm 1/16W J 0402 1 766 R283 0130-3301-1654 RES. CF 3.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 819 R343 0130-0000-1654 RES. CF 0ohm 1/16W J 0402 1 820 R344 0130-0000-1654 RES. CF 0ohm 1/16W J 0402 1 821 R345 0130-0000-1654 RES. CF 0ohm 1/16W J 0402 1 822 R346 0130-1002-1654 RES. CF 10Kohm 1/16W J 0402 1 823 R347 0130-1002-1654 RES. CF 10Kohm 1/16W J 0402 1 824 R348 0130-1002-1654 RES. CF 10Kohm 1/16W J 0402 1 825 R349 0130-1002-1654 RES. CF 10Kohm 1/16W J 0402 1 826 R35 0130-1001-1654 RES.
ITEM M/S LOCATION PART NO. DESCRIPTION Q’TY 878 R81 0130-4701-1654 RES. CF 4.7Kohm 1/16W J 0402 1 879 R82 0130-4701-1654 RES. CF 4.7Kohm 1/16W J 0402 1 880 R86 0130-1000-1654 RES. CF 100ohm 1/16W J 0402 1 881 R87 0130-1000-1654 RES. CF 100ohm 1/16W J 0402 1 882 R88 0130-1809-1654 RES. CF 18ohm 1/16W J 0402 1 883 R89 0130-5609-1654 RES. CF 56ohm 1/16W J 0402 1 884 R9 0130-4701-1654 RES. CF 4.7Kohm 1/16W J 0402 1 885 R90 0130-1809-1654 RES.
CONFIDENTIAL – DO NOT COPY Page 12-48 File No.
A B C D-MT8205AMT1V1 MT8205E (PBGA388) LCDTV 4 3 01. INDEX & POWER CONNECTOR 02. MT8205 DIGITAL POWER 03. MT8205 ANALOG POWER 04. MT8205 PBGA 388 05. DDR MEMORY & FLASH 06. DVI INPUT - SiI169B 07. VIDEO / AUDIO INPUT 08. TV & DTV INPUT 09. AV SWITCH - MM1492 10. VIDEO INPUT 11. AUDIO OUT 12.
A B C D E MT8205 DIGITAL POWER & DECOUPLING DV50A L15 3.5x6x1.0 DV33A VIN GNG CB11 0.1uF 0402C 220uF/16V Low ESR 6 3 + CE9 4 OUT 2 FB 4 ON 1 0805L TabGND L16 NC DV18A U5 DV33A U4 5 DV120B L4 LM2596S-3.3 LM2596 L23 R16 330 70uH R14 560 CB8 NC F3 2A/125V 5VSB DV50A 5VSB + 3.5x6x1.0 D2 3 CE10 1000uF/16V Low ESR R18 0 1 CB9 0.1uF 0402C DV50A CB12 0.1uF 0402C L5 IN ADJ/GND R15 AZ1086D-1.
A B C D E MT8205 ANALOG POWER AND DECOUPLING DACVREF DACFS FOR DACVDD ADCPLLVDD1 DACVREF 4 DACFS 4 ADCPLLVDD1 4 DV33A DV33A 4 CE20 10uF/16V + FB1 ADCPLLVDD DACVDD 80ohm CB34 0.1uF 0402 C7 1uF CE21 10uF/16V + CB33 0.1uF 0402 ADCPLLVDD 4 4 APLLVDD APLLVDD 4 DACVSS DACVDD C8 1uF DACVREF CB35 0.1uF 0402 DACFS C9 0.1uF/NC 0402 ANALOGVDD DACVSS VPLLVDD LVDDA R23 560 DACVSS DACVDD R24 FOR ADCVDD DV33A DV50A 3 3 IN 1 ADJ/GND CB39 0.1uF/N.
C D E TP5 TP6 B TP3 TP4 A TP9 TP11 TP12 TP13 TP14 3 VGAVSYNC# VGAHSYNC# GND DV18A SYSPLLGND ADCPLLVDD1 ADCPLLVDD SYSPLLGND SYSPLLGND ANALOGVDD MON0 MON1 ADCVDD0 REDRED+ GREENGREEN+ VGASOG BLUEBLUE+ ADCGND ADCVDD0 VOCM ADCGND VICM ADCVDD0 CRCR+ CBCB+ YY+ SOY ADCGND ADCGND ADCVDD0 ANALOGVDD XTALO XTALI SYSPLLGND APLL_CAP SYSPLLGND APLLVDD ANALOGVDD SYSPLLGND VI0 VI1 VI2 VI3 VI4 VI5 VI6 DV18A VI7 VI8 VI9 VI10 VI11 GND VI12 VI13 VI14 VI15 GND VI16 VI17 VI18 VI19 VI20 VI21 VI22 VI23 DVIODCK VGAHSY
A B C DV25 4 U11 A_RA3 A_RA2 A_RA1 A_RA0 RN1 7 5 3 1 22x4 8 6 4 2 D_RA3 D_RA2 D_RA1 D_RA0 A_RA4 A_RA5 A_RA6 A_RA7 RN3 7 5 3 1 22x4 8 6 4 2 D_RA4 D_RA5 D_RA6 D_RA7 RN5 A_RA8 7 A_RA9 5 A_RA11 3 1 22x4 8 6 4 2 D_RA8 D_RA9 D_RA11 A_RA10 R41 22 D_DQ0 D_DQ1 D_DQ2 D_DQ3 D_DQ4 D_DQ5 D_DQ6 D_DQ7 D_DQS0 D_RA10 D_DQM0 D_WE# D_CAS# D_RAS# D_CS# A_DQ0 A_DQ1 A_DQ2 A_DQ3 RN7 7 5 3 1 47x4 8 6 4 2 D_DQ0 D_DQ1 D_DQ2 D_DQ3 A_DQ4 A_DQ5 A_DQ6 A_DQ7 RN9 7 5 3 1 47x4 8 6 4 2 D_DQ4 D_DQ5 D_DQ6 D_DQ7 A_
A B C D E DV33A P1 FB20 AVCC 80ohm DV33A + CE44 10uF/16V CB136 0.1uF 0402C 3 C43 0.1uF 0402C 1 CE45 100uF/16V + IN OUT L12 2 R66 CE46 220uF/16V + NC CB138 0.1uF L21 DV50A 0805L CB36 0.1uF IOVCC 80ohm R67 0 4 + CE47 10uF/16V DATA1DATA0+ VCC18_1 80ohm D4 1N4148/NC Adj:1.25x(1+300/680) 1.25x(1+300/680)=1.8V CB139 0.1uF 0402C DATA0CLOCK+ CB37 0.
A B C D E AV1 AV1 / AV2 Input L13 2.2uH R88 18 AV1L AV1R VGA IN AV1 AV1 9 AV1L AV1R 9 9 3 AV1_IN GNDV AV2L AV1L 9 GNDV 3 6 AV1R AV2R R89 56 FB26 FB27 0 P3 DV50A L14 2.2uH R90 18 AV2 C73 330pF AV_GND C74 330pF R91 56 2 D11 BAV99/NC RCA2X3 RCA-JK2X3 FB28 VGASDA_IN 12 HSYNC# 13 VSYNC# 14 VGASCL_IN 15 0 S2Y S2C AV2L AV2R D9 1N4148 1N4148 N.C VGA_PLUGPWR FB29 FB30 AV3 AV3 GND AV3L AV3L GND AV3R AV3R GND VGA_PLUGPWR VGAL VGAR VGA_PLUGPWR CB164 0.
A B C D E TU_CVBS ADDRESS TUNER FQ1236 4 : NTSC C2 TU_CVBS AF IF SCL_5V SDA_5V 86 MPX1 TU1 NTSC_CVBS R115 33 TU_SCL SDA_5V R117 33 TU_SDA GND3 GND4 SCL_5V C139 22pF TU_V50 R120 560 TU_SCL TU_SDA 3 AF R93 TU_CVBS NC CE51 4 13 NTSC_MONO 10,13 DV120B 5VSB TU_V50 1,2,3,4,5,6,7,10,12,13,14 GND 1,2,3,4,5,6,7,10,12,13,14 GND GND NTSC_CVBS R122 470 SIF_IN MPX1 4 0402C 1,2,11 DV120B 1,2,4,7,12,14 5VSB 2 TU_V50 TU_V50 1,9,13 1,9,13 NTSC_SIF NTSC_MONO C138 22pF 04
5 4 AV_V90 SCL_5V R130 33 SCL90H SDA_5V R131 33 SDA90H C91 0.1uf 0402 CB169 DTVSY DTVSC V2-V 13 V3-V 1uF 0603C 16 STV-V 1uF 0603C 43 MTV-V CB170 1uF 0603C 3 V1-Y C85 0.01uF 0402C 5 V1-C AV1R CE59 AV2R CE60 AV3R CE61 40 CB171 AUO1R_SWO AUO2L_SWO 24 AUO2R_SWO 6 S1 12 S2 V2-L 2.2uF/25V 14 V3-L 2.2uF/25V 17 STV-L ROUT2 S1 S2 44 SCL 30 SCL90H 2.2uF/25V 4 V1-R SDA 29 SDA90H 2.2uF/25V 10 V2-R BIAS 38 BIAS 2.2uF/25V 15 V3-R 2.
A B R186 39K R187 39K CE71 47uF/16V MPX2 + AF C100 15pF 0402C R216 C D OUTPUT NC NTSC_MONO FB37 0 RED R188 C101 15pF 0402C R340 RED-IN 0 R190 75 C102 5pF 0402C R341 RED_GND CVBS1 4 R193 22 C105 47nF 0 0 REDOUT R189 68/100 C99 47nF 0402C RED+ REDOUT GND R191 100 C103 47nF 0402C RED- CVBS1+ CVBS1- CVBS2+ CVBS2- FB60 FB38 80ohm CVBS1+ 0402C E SY+ SY- 0/NC SC+ SC- C107 330pF/NC 0402C CVBS1_GND R197 0 C109 47nF CVBS1- 0402C GREEN FB39 0 R194
A B C D E SCL SDA HPVDD DV50A CE96 LMAIN1 CE98 + VGAR CE80 VGAL CE81 R346 10K 10uF/16V R347 10K 10uF/16V R348 10K SCL R231 100 SDA R233 100 + R349 10K R234 22K 10uF/16V R237 22K HPVDD FB55 + CE77 10uF/16V CB173 0.1uF 0402C SCL34H 80ohm DVDD CE78 47uF/16V + + CE79 47uF/16V CB174 0.
A B C D E AP[0..7] AN[0..7] J6 LVDS OUT GND GND AP7 AN7 CLK2+ CLK2AP6 AN6 AP5 AN5 AP4 AN4 AP3 AN3 CLK1+ CLK1AP2 AN2 AP1 AN1 AP0 AN0 LVDS_ROTATE LVDS_OPTION GND GND GND LVDSVDD LVDSVDD LVDSVDD LVDS-VDD F4 0/0805 LVDSVDD L19 3.5x6x1.0 0/0805 4 CB181 0.
A B J2 4 AO1MCLK AO1BCK AO1LRCK AO1SDATA0 VOB0 VOB1 VOB2 VOB3 RN33 1 E U0TX U0RX OGO3 OGO1 OGO2 OGO0 R286 R287 R288 R289 RN34 1 2 3 5 7 33x4 RN35 1 VOB4 2 VOB5 4 3 VOB6 6 5 VOB7 8 7 33x4 RN41 VOG0 2 1 VOG1 4 3 VOG2 6 5 VOG3 8 7 33x4 VOG4 2 RN40 1 VOG5 4 3 VOG6 6 5 VOG7 8 7 33x4 RN38 1 VOR0 2 VOR1 4 3 VOR2 6 5 VOR3 8 7 33x4 RN39 1 VOR4 2 VOR5 4 3 VOR6 6 5 VOR7 8 7 33x4 RN42 1 VOHSYNC 2 VOVSYNC 4 3 VODE 6 5 VOPCLK 8 7 33x4 ORESET# 33 R290 33 OREADY# R292 OREQUEST# R293 33 33 R284 D U0TX U0RX U2TX
5 4 3 UI1 FM-6038TM2 GND VCC 3 VOUT D RI1 47 QI1 2N3904 DI1 LED 2 1 RI3 220 3 RI4 470 1 IR BOARD ASSY' PN:3320-0012-0189 PCB' PN:0170-1640-0302 5VSB 2 1 D 2 5VSB JI1 IR LED QI2 2N3906 RI5 3.3K C 1 2 3 4 IR IR 4,7,12 CON4 RI6 3.3K CI3 0.1uF RI7 3.
A B C D E MT5351R6-V1 MT5111 / MT5351 REFERENCE DESIGN FOR AMTRAN - 4 LAYERS U18 DATE INITIAL VERSION 2005/05/11 L1 47uH +12V + C1 220uF/16v ECD8 LB_2_5 J2 R.ANGLE 3 01. INDEX AND INTERFACE 02. POWER 03. TUNER 04. MT5111 ASIC 05. MT5351 ASIC 06. MT5351 PERIPHERAL 07. DDR MEMORY 08.
A B +5V U1 1 +12V ADJ C6 0.1uF 0402C 2 + C4 220uF/16v ECD8 4 KA7805/TO220-DIP/5V OUT 3 IN VOUT + C5 220uF/16v ECD8 7805 +5V E NC L4 0805L 4 D L3 0805L +12V C +5V_Tuner C7 0.1uF 0402C GND GND L35 6 OUT 2 L5 70uH FB 4 R2 560 ON GNG C9 0.1uF 0402C 5 VIN TabGND U2 1 3 + C8 1000uF/16v ECD10 DV33 LM2596S-ADJ LM2596 R3 330 C10 D1 SB560 F1 2A/125V L6 DV33_DM DV33 NC 0805L NC + C13 1000uF/16V Low ESR + C11 220uF/16v ECD8 C16 0.1uF 0402C C14 0.
A B C D E +5V_Tuner 2 +5V_Tuner 1,2,4,5,6,7,8,9 GND GND GLOBAL SIGNAL 4 4 +5V_Tuner L11 GND GND 3 RF_AGC IF_AGC 4 RF_AGC 4 IF_AGC U6 Outdoor PS VS_splitter_+5V OOB_OP NC RF_AGC NC AS SCL SDA NC VS_Tuner_+5V Broad_IF_OP IF_AGC Narrow_IF_OP1 Narrow_IF_OP2 GND GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0ohm + C29 0805L 470uF/16v ECD5 C30 0.1uF 0402C TH1 TH2 NC 100 100 0402R 0402R 0402R Tuner_SCL Tuner_SDA 4 Tuner_SCL 4 Tuner_SDA +5V_Tuner R10 4.
A B C D E C56 1uF 0603C L19 NC/220nH 0805L C57 C58 C60 C55 NC/47pF 0402C AVDD33 AVDD33 0.1uF 0402C 0.1uF 0402C REFBOT VCMEXT C59 10uF 0805C 0.1uF 0402C DVDD18 REFTOP AVDD33 AVDD3 AVDD33 L20 C61 0.
3 2 1 PDA22 PDA21 PDA20 PDA19 PDA18 PDA17 PDA16 PDA15 PDA14 PDA13 PDA12 PDA11 PDA10 PDA9 PDA8 PDA7 PDA6 PDA5 PDA4 PDA3 PDA2 PDA1 PDA0 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 1,2,3,4,6,7,8,9 E1 F4 E3 E2 OSDA0 OSCL0 OSDA1 OSCL1 U0TX U0RX U1TX U1RX U2TX U2RX U2CTS TUNER_SW F3 F2 F1 G4 G3 G2 G1 H4 U0TX U0RX U1TX U1RX U2TX U2RX U2CTS U2RTS ASPDIF AUD_CTRL H3 H2 H1 J4 J3 J2 J1 K1 K2 K3 K4 L3 L4 AO1SDATA3 AO1SDATA2 AO1SDATA1 AO1SDATA0 AO1LRCK AO1BCK AO1MCLK AO2SDATA0 AO2LRCK AO2BCK AO2MCLK ASPDIF ASPDI
5 4 3 2 1 FS R38 560 0402R R39 NC/10M 0402R Y2 OXTALI D CAPVPLL C90 TP4 CAPVGND TEST_PD APLLCAP1 AV33 APLLCAP0 C93 1500pF 0402C 5600pF 0402C C94 1500pF 0402C R40 NC/50 0402R OXTALO NC/27MHz XTAL_DIP AV33 R41 NC/50 0402R C92 NC/20pF 0402C 1,2,5,8 2,5 2,5,7 2,5 CAPVGND ATP1 1,2,3,4,5,7,8,9 ATP2 DV33 AV33 DV25 DV12 DV33 AV33 DV25 DV12 GND GND OSDA0 OSCL0 5 OSDA0 5 OSCL0 DV33 OPWM0 C96 10nF 0402C DV33 C99 10uF/10v ECD5 C100 4.7uF 0805C C101 0.1uF 0402C C102 0.1uF 0402C C103 4.
5 4 3 +1V25_DDR RP14 22x4 RWE_ 4 RCAS_ 3 RCS_ 2 RBA0 1 RA10 4 RA0 RP18 3 RA2 22x4 2 RA3 1608R_4 1 RA5 4 RA6 RP22 3 RA8 22x4 2 RA9 1608R_4 1 D 1608R_4 5 6 7 8 5 6 7 8 5 6 7 8 MEM_WE_ MEM_CAS_ MEM_CS_ MEM_BA0 MEM_ADDR10 MEM_ADDR0 MEM_ADDR2 MEM_ADDR3 MEM_ADDR5 MEM_ADDR6 MEM_ADDR8 MEM_ADDR9 MEM_ADDR5 MEM_ADDR4 MEM_ADDR13 MEM_WE_ MEM_ADDR10 MEM_ADDR0 RP19 MEM_ADDR1 75x4 1608R_4 MEM_ADDR2 MEM_ADDR9 MEM_ADDR8 MEM_ADDR7 MEM_ADDR6 4 3 2 1 4 3 2 1 4 3 2 1 5 6 7 8 5 6 7 8 5 6 7 8 RA12 R57 22 MEM_ADDR12 ME
5 D DV33 R87 4.
A B C D E MAIN YPbPr OUTPUT MAIN_YOUT 560nH 0603L C211 120pF 0603C 3 R102 75 1% 0402R C212 47pF 0402C 1 4 L29 560nH 0603L C210 47pF 0402C 2 L28 IOG_Y4 D2 DIODE SMD BAV99 BAW99 +5V 4 +12V +12V_OPA FB5 0.47uH 0805L L31 C217 47pF 0402C 1 R103 75 1% 0402R MAIN_PbOUT 560nH 0603L C216 120pF 0603C 2 560nH 0603L C215 47pF 0402C C214 0.
5 4 3 2 1 J1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C P2 D GND G/Y B/U R/V LMAIN1 RMAIN1 J2 S1C_IN GND IR 8302NET1 8302NET2 RXD TXD AGND HPR HPL AGND HPDET AV3_IN GND_SIGNAL AV3L AGND AV3R AGND S1Y_IN GND_SIGNAL S1C_IN GND_SIGNAL SVDET2 4 GND_SIGNAL 2 P2 C Y G G 5 P1 P1 D 3 S1Y_IN 1 S GND_SIGNAL SVDET2 S-VIDEO DETECT YC_CONN_005 C J4 R1 2.2 C5 0.1uF R2 2.2 C6 0.
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CAM350 V 7.
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CAM350 V 7.
CAM350 V 7.
CAM350 V 7.
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