Specifications

DP83848C , DP83848I
DP83848VYB, DP83848YB
www.ti.com SNLS266E –MAY 2007–REVISED MARCH 2015
6.5 Programming
6.5.1 Architecture
This section describes the operations within each transceiver module, 100BASE-TX and 10BASE-T. Each
operation consists of several functional blocks and described in the following:
• 100BASE-TX Transmitter
• 100BASE-TX Receiver
• 10BASE-T Transceiver Module
6.5.1.1 100BASE-TX Transmitter
The 100BASE-TX transmitter consists of several functional blocks which convert synchronous 4-bit nibble
data, as provided by the MII, to a scrambled MLT-3 125 Mb/s serial data stream. Because the 100BASE-
TX TP-PMD is integrated, the differential output pins, PMD Output Pair, can be directly routed to the
magnetics.
The block diagram in Figure 6-5. provides an overview of each functional block within the 100BASE-TX
transmit section.
The Transmitter section consists of the following functional blocks:
• Code-group Encoder and Injection block
• Scrambler block (bypass option)
• NRZ to NRZI encoder block
• Binary to MLT-3 converter / Common Driver
The bypass option for the functional blocks within the 100BASE-TX transmitter provides flexibility for
applications where data conversion is not always required. The DP83848VYB implements the 100BASE-
TX transmit state machine diagram as specified in the IEEE 802.3 Standard, Clause 24.
Figure 6-5. 100BASE-TX Transmit Block Diagram
Copyright © 2007–2015, Texas Instruments Incorporated Detailed Description 39
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