Specifications

DP83848C , DP83848I
DP83848VYB, DP83848YB
SNLS266E –MAY 2007–REVISED MARCH 2015 www.ti.com
If the DP83848VYB completes Auto-Negotiation as a result of Parallel Detection, bits 5 and 7 within the
ANLPAR register will be set to reflect the mode of operation present in the Link Partner. Note that bits 4:0
of the ANLPAR will also be set to 00001 based on a successful parallel detection to indicate a valid 802.3
selector field. Software may determine that negotiation completed through Parallel Detection by reading a
zero in the Link Partner Auto-Negotiation Able bit once the Auto-Negotiation Complete bit is set. If
configured for parallel detect mode and any condition other than a single good link occurs then the parallel
detect fault bit will be set.
6.3.1.4 Auto-Negotiation Restart
Once Auto-Negotiation has completed, it may be restarted at any time by setting bit 9 (Restart Auto-
Negotiation) of the BMCR to one. If the mode configured by a successful Auto-Negotiation loses a valid
link, then the Auto-Negotiation process will resume and attempt to determine the configuration for the link.
This function ensures that a valid configuration is maintained if the cable becomes disconnected.
A renegotiation request from any entity, such as a management agent, will cause the DP83848VYB to halt
any transmit data and link pulse activity until the break_link_timer expires (~1500 ms). Consequently, the
Link Partner will go into link fail and normal Auto-Negotiation resumes. The DP83848VYB will resume
Auto-Negotiation after the break_link_timer has expired by issuing FLP (Fast Link Pulse) bursts.
6.3.1.5 Enabling Auto-Negotiation Through Software
It is important to note that if the DP83848VYB has been initialized upon power up as a non-auto-
negotiating device (forced technology), and it is then required that Auto-Negotiation or re-Auto-Negotiation
be initiated through software, bit 12 (Auto-Negotiation Enable) of the Basic Mode Control Register (BMCR)
must first be cleared and then set for any Auto-Negotiation function to take effect.
6.3.1.6 Auto-Negotiation Complete Time
Parallel detection and Auto-Negotiation take approximately 2-3 seconds to complete. In addition, Auto-
Negotiation with next page should take approximately 2-3 seconds to complete, depending on the number
of next pages sent.
Refer to Clause 28 of the IEEE 802.3 standard for a full description of the individual timers related to Auto-
Negotiation.
6.3.2 Auto-MDIX
When enabled, this function uses Auto-Negotiation to determine the proper configuration for transmission
and reception of data and subsequently selects the appropriate MDI pair for MDI/MDIX operation. The
function uses a random seed to control switching of the crossover circuitry. This implementation complies
with the corresponding IEEE 802.3 Auto-Negotiation and Crossover Specifications.
Auto-MDIX is enabled by default and can be configured through strap or through PHYCR (19h) register,
bits [15:14].
Neither Auto-Negotiation nor Auto-MDIX is required to be enabled in forcing crossover of the MDI pairs.
Forced crossover can be achieved through the FORCE_MDIX bit, bit 14 of PHYCR (19h) register.
NOTE
Auto-MDIX will not work in a forced mode of operation.
6.3.3 LED Interface
The DP83848VYB supports three configurable Light Emitting Diode (LED) pins. The device supports three
LED configurations: Link, Speed, Activity and Collision. Function are multiplexed among the LEDs. The
PHY Control Register (PHYCR) for the LEDs can also be selected through address 19h, bits [6:5].
See Table 6-2 for LED Mode selection.
30 Detailed Description Copyright © 2007–2015, Texas Instruments Incorporated
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