Specifications

DP83848C , DP83848I
DP83848VYB, DP83848YB
SNLS266E –MAY 2007–REVISED MARCH 2015 www.ti.com
SIGNAL NAME TYPE PIN # DESCRIPTION
RD-, RD+ I/O 13 Differential receive input (PMD Input Pair). These differential inputs are automatically
14 configured to accept either 100BASE-TX or 10BASE-T signaling.
In Auto-MDIX mode of operation, this pair can be used as the Transmit Output pair.
These pins require 3.3-V bias for operation.
4.11 Special Connections
SIGNAL NAME TYPE PIN # DESCRIPTION
RBIAS I 24 Bias Resistor Connection: A 4.87 kΩ 1% resistor should be connected from RBIAS to
GND.
PFBOUT O 23 Power Feedback Output: Parallel caps, 10 µF (Tantalum preferred) and 0.1 µF, should be
placed close to the PFBOUT. Connect this pin to PFBIN1 (pin 18) and PFBIN2 (pin 37). See
Section 7.2.1.3 for proper placement pin.
PFBIN1 I 18 Power Feedback Input: These pins are fed with power from PFBOUT pin. A small capacitor
PFBIN2 37 of 0.1 µF should be connected close to each pin.
(1)
RESERVED I/O 20, 21 RESERVED: These pins must be pulled-up through 2.2 kΩ resistors to AVDD33 supply.
(1) Note: Do not supply power to these pins other than from PFBOUT.
4.12 Power Supply Pins
SIGNAL NAME PIN # DESCRIPTION
IOVDD33 32, 38 I/O 3.3-V Supply
IOGND 35, 47 I/O Ground
DGND 36 Digital Ground
AVDD33 22 Analog 3.3-V Supply
AGND 15, 19 Analog Ground
GNDPAD 49 Ground PAD
10 Pin Configuration and Functions Copyright © 2007–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DP83848C DP83848I DP83848VYB DP83848YB