Specifications

Pin 19 (PFBOUT)
Pin 16 (PFBIN1)
Pin 30 (PFBIN2)
10 PF
0.1 PF
0.1 PF
0.1 PF
+
-
DP83848Q-Q1
www.ti.com SNLS341C –MARCH 2011–REVISED MARCH 2015
Table 6-1. 25-MHz Oscillator Specification
PARAMETER MIN TYP MAX UNIT CONDITION
Frequency 25 MHz
Frequency Tolerance ±50 ppm Operational Temperature
Frequency Stability ±50 ppm 1 year aging
Rise / Fall Time 6 nsec 20% - 80%
Jitter 800
(1)
psec Short term
Jitter 800
(1)
psec Long term
Symmetry 40% 60% Duty Cycle
(1) This limit is provided as a guideline for component selection and not specified by production testing. Refer to SNLA091, PHYTER 100
Base-TX Reference Clock Jitter Tolerance, for details on jitter performance.
Table 6-2. 50-MHz Oscillator Specification
PARAMETER MIN TYP MAX UNIT CONDITION
Frequency 50 MHz
Frequency Tolerance ±50 ppm Operational Temperature
Frequency Stability ±50 ppm Operational Temperature
Rise / Fall Time 6 nsec 20% - 80%
Jitter 800
(1)
psec Short term
Jitter 800
(1)
psec Long term
Symmetry 40% 60% Duty Cycle
(1) This limit is provided as a guideline for component selection and not specified by production testing. Refer to SNLA091, PHYTER 100
Base-TX Reference Clock Jitter Tolerance, for details on jitter performance.
Table 6-3. 25-MHz Crystal Specification
PARAMETER MIN TYP MAX UNIT CONDITION
Frequency 25 MHz
Frequency Tolerance ±50 ppm Operational Temperature
Frequency Stability ±50 ppm 1 year aging
Load Capacitance 25 40 pF
6.2.1.3 Power Feedback Circuit
To ensure correct operation for the DP83848Q-Q1 , parallel caps with values of 10 µF and 0.1 µF should
be placed close to pin 23 (PFBOUT) of the device.
Pin 18 (PFBIN1), pin 37 (PFBIN2), pin 23 (PFBIN3) and pin 54 (PFBIN4) must be connected to pin 31
(PFBOUT), each pin requires a small capacitor (0.1 µF). See Figure 6-4 below for proper connections.
Figure 6-4. Power Feedback Connection
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