Specifications

DP83848Q-Q1
SNLS341C –MARCH 2011–REVISED MARCH 2015 www.ti.com
Table 5-24. PHY Control Register (PHYCR), address 0x19h (continued)
BIT BIT NAME DEFAULT DESCRIPTION
5 LED_CFG Strap, RW LED Configuration
LED_CFG Mode Description
1 Mode 1
0 Mode 2
In Mode 1, LED is configured as follows:
LED_LINK = ON for Good Link, OFF for No Link
In Mode 2, LED is configured as follows:
LED_LINK = ON for good Link, BLINK for Activity
4:0 PHYADDR[4:0] Strap, RW PHY Address: PHY address for port.
5.6.2.8 10 Base-T Status/Control Register (10BTSCR)
This register is used for control and status for 10BASE-T device operation.
Table 5-25. 10Base-T Status/Control Register (10BTSCR), address 1Ah
BIT BIT NAME DEFAULT DESCRIPTION
15:1 RESERVED 0, RW RESERVED: Must be zero.
2
11:9 SQUELCH 100, RW Squelch Configuration:
Used to set the Squelch ON threshold for the receiver.
Default Squelch ON is 330mV peak.
8 LOOPBACK_10_DIS 0, RW 10Base-T Loopback Disable:
In half-duplex mode, default 10BASE-T operation loops Transmit data to the
Receive data in addition to transmitting the data on the physical medium. This is
for consistency with earlier 10BASE2 and 10BASE5 implementations which used
a shared medium. Setting this bit disables the loopback function.
This bit does not affect loopback due to setting BMCR[14].
7 LP_DIS 0, RW Normal Link Pulse Disable:
1 = Transmission of NLPs is disabled.
0 = Transmission of NLPs is enabled.
6 FORCE_LINK_10 0, RW Force 10Mb Good Link:
1 = Forced Good 10Mb Link.
0 = Normal Link Status.
5 RESERVED 0, RW RESERVED: Must be zero.
4 POLARITY RO/LH 10Mb Polarity Status:
This bit is a duplication of bit 12 in the PHYSTS register. Both bits will be cleared
upon a read of 10BTSCR register, but not upon a read of the PHYSTS register.
1 = Inverted Polarity detected.
0 = Correct Polarity detected.
3 RESERVED 0, RW RESERVED: Must be zero.
2 RESERVED 1, RW RESERVED: Must be set to one.
1 HEARTBEAT_DIS 0, RW Heartbeat Disable: This bit only has influence in half-duplex 10Mb mode.
1 = Heartbeat function disabled.
0 = Heartbeat function enabled.
When the device is operating at 100Mb or configured for full duplex
operation, this bit will be ignored - the heartbeat function is disabled.
0 JABBER_DIS 0, RW Jabber Disable:
Applicable only in 10BASE-T.
1 = Jabber function disabled.
0 = Jabber function enabled.
60 Detailed Description Copyright © 2011–2015, Texas Instruments Incorporated
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