Specifications

DP83848Q-Q1
SNLS341C –MARCH 2011–REVISED MARCH 2015 www.ti.com
3.2 Package Pin Assignments
PIN NO. PIN NAME
1 IO_VDD
2 TX_CLK
3 TX_EN
4 TXD_0
5 TXD_1
6 TXD_2
7 TXD_3
8 RESERVED
9 RESERVED
10 RESERVED
11 RD–
12 RD+
13 AGND
14 TD–
15 TD+
16 PFBIN1
17 AGND
18 AVDD33
19 PFBOUT
20 RBIAS
21 CLK_OUT
22 LED_LINK/AN0
23 RESET_N
24 MDIO
25 MDC
26 IOVDD33
27 X2
28 X1
29 DGND
30 PFBIN2
31 RX_CLK
32 RX_DV/MII_MODE
33 CRS/CRS_DV/LED_CFG
34 RX_ER/MDIX_EN
35 COL/PHYAD0
36 RXD_0/PHYAD1
37 RXD_1/PHYAD2
38 RXD_2/PHYAD3
39 RXD_3/PHYAD4
40 IOGND
DAP NC or GND
(1)
(1) Die Attach Pad (DAP) provides thermal dissipation. Connection to GND plane recommended.
6 Pin Configuration and Functions Copyright © 2011–2015, Texas Instruments Incorporated
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