Datasheet

TFDU4101
www.vishay.com
Vishay Semiconductors
Rev. 1.7, 29-Jun-2018
7
Document Number: 81288
For technical questions within your region: irdasupportAM@vishay.com
, irdasupportAP@vishay.com, irdasupportEU@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 2 - Typical Application Circuit
Grey: Optional for High/Low Switching
I/O AND SOFTWARE
In the description, already different I/Os are mentioned.
Different combinations are tested and the function verified
with the special drivers available from the I/O suppliers. In
special cases refer to the I/O manual, the Vishay application
notes, or contact directly Vishay Sales, Marketing or
Application.
CURRENT DERATING DIAGRAM
Fig. 3 shows the maximum operating temperature when the
device is operated without external current limiting resistor.
Fig. 3 - Current Derating Diagram
20038
R2
C2
IRED anode (1)
IRED cathode (2)
TXD (3)
RXD (4)
SD (5)
V
CC1
(6)
GND (8)
V
s
= 2.8 V
V
dd
V
batt
3 V
IRT
X
IRR
X
IR MOD
E
R1
Hi/Low
C1
50
55
60
65
70
75
80
85
90
2 2.5 3 3.5 4 4.5 5 5.5 6
Operating Voltage (V) at Duty Cycle 20 %
Ambient Temperature (°C)
18097
TABLE 2 - TRUTH TABLE
INPUTS OUTPUTS REMARK
SD TXD
OPTICAL INPUT IRRADIANCE
mW/m
2
RXD TRANSMITTER OPERATION
High
> 1 ms
xx
Weakly pulled
(500 kΩ) to V
CC1
0 Shutdown
Low
High < 50 μs x Low active I
e
Transmitting
High > 50 μs x High inactive 0 Protection is active
Low < 4 High inactive 0
Ignoring low signals below the
IrDA defined threshold for noise
immunity
Low
> min. irradiance E
e
< max. irradiance E
e
Low (active) 0
Response to an IrDA compliant
optical input signal
Low > max. irradiance E
e
Undefined 0
Overload conditions can cause
unexpected outputs