Datasheet

ManualsBrandsVISHAY ManualsFETsSI5933CDC-T1-GE3, MOSFET

Vishay Siliconix

Si5933CDC

Document Number: 68822

S10-0548-Rev. B, 08-Mar-10

www.vishay.com

Dual P-Channel 20 V (D-S) MOSFET

FEATURES

• Halogen-free According to IEC 61249-2-21

Definition

• TrenchFET

Power MOSFET

• 100 % R

Tested

• Compliant to RoHS Directive 2002/95/EC

APPLICATIONS

• Load Switch for Portable Devices

PRODUCT SUMMARY

(V) R

DS(on)

(Ω)I

(A)

(Typ.)

- 20

0.144 at V

= - 4.5 V

- 3.7

4.1 nC

0.180 at V

= - 2.5 V

- 3.0

0.222 at V

= - 1.8 V

- 3.0

Marking Code

XXX

Lot Traceabilit

and Date Cod

Part #

Code

1206-8 ChipFET

Bottom View

Ordering Information: Si5933CDC-T1-E3 (Lead (Pb)-free)

Si5933CDC-T1-GE3 (Lead (Pb)-free and Halogen-free)

P-Channel MOSFET

Notes:

a. Based on T

= 25 °C.

b. Surface mounted on 1" x 1" FR4 board.

c. t = 5 s.

d. See Solder Profile (www.vishay.com/ppg?73257

). The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not

plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required

to ensure adequate bottom side solder interconnection.

e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.

f. Maximum under steady state conditions is 130 °C/W.

ABSOLUTE MAXIMUM RATINGS T

= 25 °C, unless otherwise noted

Parameter Symbol Limit Unit

Drain-Source Voltage

- 20

Gate-Source Voltage

± 8

Continuous Drain Current (T

= 150 °C)

= 25 °C

- 3.7

= 70 °C

- 3.0

= 25 °C

- 2.5

b, c

= 70 °C

- 2.0

b, c

Pulsed Drain Current

- 10

Continuous Source-Drain Diode Current

= 25 °C

- 2.3

= 25 °C

- 1.1

b, c

Maximum Power Dissipation

= 25 °C

2.8

= 70 °C

1.8

= 25 °C

1.3

b, c

= 70 °C

0.8

b, c

Operating Junction and Storage Temperature Range

, T

stg

- 55 to 150

°C

Soldering Recommendations (Peak Temperature)

d, e

260

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient

b, f

t ≤ 5 s

thJA

82 99

°C/W

Maximum Junction-to-Foot (Drain) Steady State R

thJF

35 45

Summary of content (11 pages)

PAGE 1
Si5933CDC Vishay Siliconix Dual P-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY RDS(on) (Ω) ID (A)a 0.144 at VGS = - 4.5 V - 3.7 0.180 at VGS = - 2.5 V - 3.0 0.222 at VGS = - 1.8 V - 3.0 VDS (V) - 20 Qg (Typ.) 4.
PAGE 2
Si5933CDC Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = - 250 µA - 20 Typ. Max.
PAGE 3
Si5933CDC Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2.0 10 VGS = 5 V thru 2.5 V VGS = 2 V I D - Drain Current (A) I D - Drain Current (A) 8 6 4 VGS = 1.5 V 1.5 1.0 TC = 25 °C 0.5 2 TC = 125 °C VGS = 1 V 0 1 2 3 4 TC = - 55 °C 0.0 0.0 0 5 0.3 VDS - Drain-to-Source Voltage (V) 0.9 1.2 1.5 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 0.30 540 0.25 450 VGS = - 1.
PAGE 4
Si5933CDC Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 0.25 100 R DS(on) - On-Resistance (Ω) I S - Source Current (A) ID = 2.5 A 10 TJ = 150 °C TJ = 25 °C 1 0.1 0.0 0.20 TJ = 125 °C 0.15 0.10 TJ = 25 °C 0.05 0.00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 1.6 2 VSD - Source-to-Drain Voltage (V) 4 6 8 VGS - Gate-to-Source Voltage (V) Forward Diode Voltage vs. Temperature On-Resistance vs. Gate-to-Source Voltage 0.7 5 0.6 4 0.
PAGE 5
Si5933CDC Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 5 I D - Drain Current (A) 4 3 2 1 0 0 25 50 75 100 125 150 TC - Case Temperature (°C) 4 1.2 3 0.9 Power (W) Power (W) Current Derating* 2 1 0.6 0.3 0 0.
PAGE 6
Si5933CDC Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 Notes: 0.05 PDM 0.02 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 110 °C/W Single Pulse 3. TJM - TA = PDMZthJA(t) 4. Surface Mounted 0.
PAGE 7
Package Information Vishay Siliconix 1206-8 ChipFETR 4 L D 8 7 6 5 4 1 S 2 e 3 E1 5 6 7 8 4 3 2 1 E 4 b x c Backside View 2X 0.10/0.13 R C1 A DETAIL X NOTES: 1. All dimensions are in millimeaters. 2. Mold gate burrs shall not exceed 0.13 mm per side. 3. Leadframe to molded body offset is horizontal and vertical shall not exceed 0.08 mm. 4. Dimensions exclusive of mold gate burrs. 5. No mold flash allowed on the top and bottom lead surface.
PAGE 8
AN812 Vishay Siliconix Dual-Channel 1206-8 ChipFETr Power MOSFET Recommended Pad Pattern and Thermal Performance INTRODUCTION New Vishay Siliconix ChipFETs in the leadless 1206-8 package feature the same outline as popular 1206-8 resistors and capacitors but provide all the performance of true power semiconductor devices.
PAGE 9
AN812 Vishay Siliconix Front of Board Back of Board ChipFETr vishay.com FIGURE 3. Junction-to-Foot Thermal Resistance (the Package Performance) Thermal performance for the 1206-8 ChipFET measured as junction-to-foot thermal resistance is 30_C/W typical, 40_C/W maximum for the dual device. The “foot” is the drain lead of the device as it connects with the body.
PAGE 10
Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR 1206-8 ChipFET® 0.093 0.026 0.016 0.010 (0.650) (0.406) (0.244) 0.036 (0.914) 0.022 (0.559) (2.032) 0.080 (2.357) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.
PAGE 11
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