Datasheet

ManualsBrandsVISHAY ManualsFETsIRLIZ14GPBF, MOSFET

Document Number: 91315 www.vishay.com

S09-0896-Rev. B, 25-May-09 1

Power MOSFET

IRLIZ14G, SiHLIZ14G

Vishay Siliconix

FEATURES

• Isolated Package

• High Voltage Isolation = 2.5 kV

RMS

(t = 60 s;

f = 60 Hz)

• Sink to Lead Creepage Distance = 4.8 mm

• Logic-Level Gate Drive

•R

DS(on)

Specified at V

= 4 V and 5 V

• Fast Switching

• Ease of Paralleling

• Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

Third generation Power MOSFETs from Vishay provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The TO-220 FULLPAK eliminates the need for additional

insulating hardware in commercial-industrial applications.

The molding compound used provides a high isolation

capability and a low thermal resistance between the tab and

external heatsink. This isolation is equivalent to using a 100

micron mica barrier with standard TO-220 product. The

FULLPAK is mounted to a heatsink using a single clip or by

a single screw fixing.

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. V

= 25 V, starting T

= 25 °C, L = 0.79 mH, R

= 25 Ω, I

= 10 A (see fig. 12).

c. I

≤ 10 A, dI/dt ≤ 90 A/µs, V

≤ V

, T

≤ 175 °C.

d. 1.6 mm from case.

PRODUCT SUMMARY

(V) 60

DS(on)

(Ω)V

= 5.0 V 0.20

(Max.) (nC) 8.4

(nC) 3.5

(nC) 6.0

Configuration Single

N-Channel MOSFET

TO-220 FULLPAK

Available

RoHS*

COMPLIANT

ORDERING INFORMATION

Package TO-220 FULLPAK

Lead (Pb)-free

IRLIZ14GPbF

SiHLIZ14G-E3

SnPb

IRLIZ14G

SiHLIZ14G

ABSOLUTE MAXIMUM RATINGS T

= 25 °C, unless otherwise noted

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

± 10

Continuous Drain Current V

at 5.0 V

= 25 °C

8.0

= 100 °C

5.7

Pulsed Drain Current

Linear Derating Factor

0.18

W/°C

Single Pulse Avalanche Energy

39.5

Maximum Power Dissipation T

= 25 °C P

Peak Diode Recovery dV/dt

dV/dt

4.5

V/ns

Operating Junction and Storage Temperature Range T

, T

stg

- 55 to + 175

°C

Soldering Recommendations (Peak Temperature) for 10 s

300

Mounting Torque 6-32 or M3 screw

lbf · in

1.1

N · m

* Pb containing terminations are not RoHS compliant, exemptions may apply

Summary of content (8 pages)

PAGE 1
IRLIZ14G, SiHLIZ14G Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Isolated Package • High Voltage Isolation = 2.5 kVRMS (t = 60 s; f = 60 Hz) • Sink to Lead Creepage Distance = 4.8 mm • Logic-Level Gate Drive • RDS(on) Specified at VGS = 4 V and 5 V • Fast Switching • Ease of Paralleling • Compliant to RoHS Directive 2002/95/EC 60 RDS(on) (Ω) VGS = 5.0 V 0.20 Qg (Max.) (nC) 8.4 Qgs (nC) 3.5 Qgd (nC) 6.
PAGE 2
IRLIZ14G, SiHLIZ14G Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 65 Maximum Junction-to-Case (Drain) RthJC - 5.5 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 µA 60 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.070 - V/°C VGS(th) VDS = VGS, ID = 250 µA 1.0 - 2.
PAGE 3
IRLIZ14G, SiHLIZ14G Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC= 175 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91315 S09-0896-Rev. B, 25-May-09 www.vishay.
PAGE 4
IRLIZ14G, SiHLIZ14G Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91315 S09-0896-Rev.
PAGE 5
IRLIZ14G, SiHLIZ14G Vishay Siliconix RD VDS VGS D.U.T. RG + - VDD 5V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T. RG + - I AS V DD VDS 5V tp 0.01 Ω Fig.
PAGE 6
IRLIZ14G, SiHLIZ14G Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 5V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91315 S09-0896-Rev.
PAGE 7
IRLIZ14G, SiHLIZ14G Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T.
PAGE 8
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